DS90UH948-Q1
- Qualified for automotive applications
- AEC-Q100 qualified with the following results:
- Device temperature grade 2: –40°C to +105°C ambient operating temperature
- Supports pixel clock frequency up to 192 MHz for up to 2K (2048x1080) resolutions with 24-bit color depth
- 1-Lane or 2-lane FPD-Link III interface with de-skew capability
- Single or dual OpenLDI (LVDS) transmitter
- Single channel: up to 96-MHz pixel clock
- Dual channel: up to 192-MHz pixel clock
- Configurable 18-Bit RGB or 24-bit RGB
- Integrated HDCP cipher engine with on-chip key storage
- Supports HDCP repeater applications
-
Functional Safety-Capable
- Documentation available to aid ISO 26262 system design
- Four high-speed GPIOs (up to 2 Mbps each)
- Adaptive receive equalization
- Compensates for channel insertion loss of up to –15.5 dB at 1.48 GHz and -9 dB at 1.68 GHz
- Provides automatic temperature and cable aging compensation
- SPI control interfaces up to 3.3 Mbps
- I2C (Controller/Target) With 1-Mbps fast-mode plus
- Image enhancement (white balance and dithering)
- Supports 7.1 multiple I2S (4 data) channels
The DS90UH948-Q1 is a FPD-Link III deserializer which, in conjunction with the DS90UH949A/949/947-Q1 serializers, converts 1-lane or 2-lane FPD-Link III streams into a FPD-Link (OpenLDI) interface. The deserializer is capable of operating over cost-effective 50-Ω single-ended coaxial or 100-Ω differential shielded twisted-pair (STP) cables. It recovers the data from one or two FPD-Link III serial streams and translates it into dual pixel FPD-Link (8 LVDS data lanes + clock) supporting video resolutions up to 2K (2048x1080) with 24-bit color depth. This provides a bridge between HDMI enabled sources such as GPUs to connect to existing LVDS displays or application processors.
The FPD-Link III interface supports video and audio data transmission and full duplex control, including I2C and SPI communication, over the same differential link. Consolidation of video data and control over two differential pairs decreases the interconnect size and weight and simplifies system design. EMI is minimized by the use of low voltage differential signaling, data scrambling, and randomization. In backward compatible mode, the device supports up to WXGA and 720p resolutions with 24-bit color depth over a single differential link.
The device automatically senses the FPD-Link III channels and supplies a clock alignment and de-skew functionality without the need for any special training patterns. This ensures skew phase tolerance from mismatches in interconnect wires such as PCB trace routing, cable pair-to-pair length differences, and connector imbalances.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | DS90UH948-Q1 Automotive 2K FPD-Link III to OpenLDI Deserializer With HDCP datasheet (Rev. D) | PDF | HTML | 2022/2/18 | ||
| 使用指南 | FPD-Link Margin Analysis Program (MAP) user's guide | 2019/1/14 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
DS90UH948-Q1EVM — DS90UH948-Q1EVM FPD-Link III 解串器評估模組
德州儀器 DS90UH948-Q1EVM 評估模組 (EVM) 可將 FPD-Link III 轉換為 OpenLDI。
此套件將演示 DS90UH948-Q1 的功能和操作。DS90UH948-Q1 支援 HDCP 內容保護。DS90UH948-Q1 是一款 FPD-Link III 解串器，搭配 DS90Ux949/929/947-Q1 串聯器使用時，可從一或兩個 FPD-Link III 序列流中復原資料，並將其轉換為單像素或雙像素的 OpenLDI LVDS，進而支援高達 WUXGA 與 1080p60 解析度以及 24 位元色彩深度。
FPD-Link III (...)
ALP — Analog LaunchPad Framework Utility
ALP-PROFILE-UPDATE — Analog LaunchPad Profile Update Software
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN (NKD) | 64 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。