DS90UB633A-Q1

現行

1M 像素 ADAS 60-100MHz PCLK 串聯器

產品詳細資料

Applications Advanced Driver Assistance Systems (ADAS) Input compatibility LVCMOS Function Serializer Output compatibility FPD-Link III LVDS Color depth (bpp) 12 Features Low-EMI Point-to-Point Communication Signal conditioning Adaptive Equalizer EMI reduction LVDS Diagnostics BIST Rating Automotive Operating temperature range (°C) -40 to 105
Applications Advanced Driver Assistance Systems (ADAS) Input compatibility LVCMOS Function Serializer Output compatibility FPD-Link III LVDS Color depth (bpp) 12 Features Low-EMI Point-to-Point Communication Signal conditioning Adaptive Equalizer EMI reduction LVDS Diagnostics BIST Rating Automotive Operating temperature range (°C) -40 to 105
WQFN (RTV) 32 25 mm² (5 mm × 5 mm)
  • AEC-Q100 qualified for automotive applications with the following results:
    • Device temperature grade 2: –40°C to +105°C ambient operating temperature
  • 56.25-MHz to 100-MHz input pixel clock support
  • Robust Power-Over-Coaxial (PoC) operation
  • Programmable data payload:
    • 8/10-Bit payload 75-MHz to 100-MHz
    • 12-Bit payload 56.25-MHz to 100-MHz
  • Continuous low latency bidirectional control interface channel with I2C support at 400-kHz
  • Embedded clock with DC-balanced coding to support AC-coupled interconnects
  • Capable of driving up to 15-m coaxial or Shielded Twisted-Pair (STP) cables
  • 4 Dedicated General-Purpose Input/Output (GPIO)
  • 1.8-V, 2.8-V or 3.3-V compatible parallel inputs on serializer
  • Single power supply at 1.8-V
  • ISO 10605 and IEC 61000-4-2 ESD compliant
  • Compatible with DS90UB66x-Q1 and DS90UB63x-Q1 deserializers
  • AEC-Q100 qualified for automotive applications with the following results:
    • Device temperature grade 2: –40°C to +105°C ambient operating temperature
  • 56.25-MHz to 100-MHz input pixel clock support
  • Robust Power-Over-Coaxial (PoC) operation
  • Programmable data payload:
    • 8/10-Bit payload 75-MHz to 100-MHz
    • 12-Bit payload 56.25-MHz to 100-MHz
  • Continuous low latency bidirectional control interface channel with I2C support at 400-kHz
  • Embedded clock with DC-balanced coding to support AC-coupled interconnects
  • Capable of driving up to 15-m coaxial or Shielded Twisted-Pair (STP) cables
  • 4 Dedicated General-Purpose Input/Output (GPIO)
  • 1.8-V, 2.8-V or 3.3-V compatible parallel inputs on serializer
  • Single power supply at 1.8-V
  • ISO 10605 and IEC 61000-4-2 ESD compliant
  • Compatible with DS90UB66x-Q1 and DS90UB63x-Q1 deserializers

The DS90UB633A-Q1 device offers an FPD-Link III interface with a high-speed forward channel and a bidirectional control channel for data transmission over a single coaxial cable or differential pair. The DS90UB633A-Q1 device incorporates differential signaling on both the high-speed forward channel and bidirectional control channel data paths. The serializer/deserializer pair is targeted for connections between imagers and video processors in an electronic control unit (ECU). This device is ideally suited for driving video data requiring up to 12-bit pixel depth plus two synchronization signals along with bidirectional control channel bus.

Using TI’s embedded clock technology allows transparent full-duplex communication over a single differential pair, carrying asymmetrical-bidirectional control channel information. This single serial stream simplifies transferring a wide data bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. This significantly saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins. Internal DC-balanced encoding/decoding is used to support AC-coupled interconnects.

The DS90UB633A-Q1 device offers an FPD-Link III interface with a high-speed forward channel and a bidirectional control channel for data transmission over a single coaxial cable or differential pair. The DS90UB633A-Q1 device incorporates differential signaling on both the high-speed forward channel and bidirectional control channel data paths. The serializer/deserializer pair is targeted for connections between imagers and video processors in an electronic control unit (ECU). This device is ideally suited for driving video data requiring up to 12-bit pixel depth plus two synchronization signals along with bidirectional control channel bus.

Using TI’s embedded clock technology allows transparent full-duplex communication over a single differential pair, carrying asymmetrical-bidirectional control channel information. This single serial stream simplifies transferring a wide data bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. This significantly saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins. Internal DC-balanced encoding/decoding is used to support AC-coupled interconnects.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 DS90UB633A-Q1 60-MHz to 100-MHz FPD-Link III Serializer datasheet (Rev. A) PDF | HTML 2020/11/12

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開發板

DS90UB933-Q1EVM — 適用於 STP 或同軸電纜的 100 MHz 12 位元 DS90UB933-Q1 FPD-Link III 串聯器評估模組

DS90UB933-Q1EVM 評估模組 (EVM) 可協助您評估 DS90UB933-Q1 37.5MHz 至 100MHz FPD-Link III 串聯器 (SER) 的運作及性能。此裝置將 10 或 12 位元的 LVCMOS 資料轉換為高速序列化 FPD-Link III 介面,並透過一根 50Ω 的同軸纜線進行傳輸。
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ALP — Analog LaunchPad Framework Utility

To get started with Analog LaunchPad (ALP) software: Download and install the ALP Framework Utility. Add new device profiles and example scripts with the ALP-PROFILE-UPDATE tool.
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DS90UB633A-Q1 IBIS Model

SLNM006.ZIP (79 KB) - IBIS 模型
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WQFN (RTV) 32 Ultra Librarian

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