DS90UB936-Q1
- AEC-Q100 qualified for automotive applications:
- Device temperature grade 2: –40℃ to +105℃ ambient operating temperature range
- 2.528 Gbps CSI-2 video bandwidth per channel
- MIPI DPHY Version 1.2 / CSI-2 Version 1 .3 compliant
- CSI-2 output ports
- Supports 1, 2, 4 data lanes
- CSI-2 data rate scalable for 400 Mbps / 800 Mbps / 1.5 Gbps / 1.6 Gbps each data lane
- Programmable data types
- Four virtual channels
- ECC and CRC generation
- 2x2 Output replication mode
- Ultra-low data and control path latency
- Supports single-ended coaxial or Shielded Twisted-Pair (STP) cable
- Adaptive receive equalization
- I2C with fast-mode plus up to 1 Mbps
- Flexible GPIOs for camera diagnostics
- Compatible with DS90UB935-Q1, DS90UB953-Q1, DS90UB933-Q1 and DS90UB913A-Q1 serializers
- Line fault detection and advanced diagnostics
- ISO 10605 and IEC 61000-4-2 ESD compliant
The DS90UB936-Q1 is a versatile deserializer capable of receiving serialized sensor data from source through an FPD-Link III interface. When paired with a DS90UB935-Q1 serializer, the DS90UB936-Q1 receives data from imagers supporting up to 2.528 Gbps CSI-2 throughput. The DS90UB936-Q1 may also be used with other compatible serializers such as the DS90UB933-Q1, and DS90UB913A-Q1. When configuring the CSI-2 interface for 2-lane operation, a duplicate MIPI CSI-2 clock lane is available to provide a replicated output. Replication mode creates two copies of the video stream for data logging and parallel processing.
The DS90UB935/936-Q1 chipset is AEC-Q100 qualified and designed to receive data across either 50-Ω single-ended coaxial or 100-Ω differential STP cables. AEC-Q100 qualification includes device temperature grade 2 (–40℃ to +105℃ ambient operating temperature range), device HBM ESD classification level ±4.5 kV, and device CDM ESD classification level C5. The deserializer hub is ideal for Power-over-Coax applications and the receive equalizer automatically adapts to compensate for cable loss characteristics with no additional programming required, including cable degradation over time.
Each FPD-Link III interface includes a separate low latency bidirectional control channel (BCC) that continuously conveys I2C, GPIO, and other control information. GPIO signals purposed for sensor synchronization and diagnostic features also make use of the BCC.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | DS90UB936-Q1 Dual 3 Gbps FPD-Link III Deserializer Hub With MIPI CSI-2 Outputs datasheet (Rev. C) | PDF | HTML | 2023/1/27 | ||
| 技術文章 | DS90UB936-Q1 No Display Troubleshooting Guidelines | PDF | HTML | 2025/9/25 | |||
| 使用指南 | FPD-Link Margin Analysis Program (MAP) user's guide | 2019/1/14 | ||||
| 技術文章 | Next-generation FPD-Link III devices add speed and flexibility to Advanced Driver | PDF | HTML | 2017/10/18 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
ALP — Analog LaunchPad Framework Utility
ALP-PROFILE-UPDATE — Analog LaunchPad Profile Update Software
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RGZ) | 48 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。