TSER4905

現行

適用高解析度面板的 4K DSI 至 V³Link™ 串聯器

產品詳細資料

Applications Display SerDes Color depth (bpp) 30 Function Serializer Input compatibility DSI Pixel clock frequency (max) (MHz) 1110 Output compatibility V3Link Features CRC, Coax or STP, Flexible GPIOs, I2C Config, Line Fault Detection, Pattern Generation, Ultra-Low Data and Control Path Latency Signal conditioning Adaptive Equalizer EMI reduction LVDS Diagnostics BIST Rating Catalog Operating temperature range (°C) -20 to 85
Applications Display SerDes Color depth (bpp) 30 Function Serializer Input compatibility DSI Pixel clock frequency (max) (MHz) 1110 Output compatibility V3Link Features CRC, Coax or STP, Flexible GPIOs, I2C Config, Line Fault Detection, Pattern Generation, Ultra-Low Data and Control Path Latency Signal conditioning Adaptive Equalizer EMI reduction LVDS Diagnostics BIST Rating Catalog Operating temperature range (°C) -20 to 85
VQFNP (RTD) 64 81 mm² (9 mm × 9 mm)
  • Single or dual port MIPI DSI receiver
    • Compliant to D-PHY v1.2 and DSI v1.3.1
    • Packed 16/18/24/30-bit RGB and 16-bit YCbCr
    • Loosely packed 18-bit RGB and 20-bit 4:2:2
    • 1 clock lane and 1-4 configurable data lanes per D-PHY Port
    • Up to 2.5 Gbps/lane with skew calibration
    • Supports data lane swap and polarity inversion
    • Supports both burst and non-burst mode
    • SuperFrame Unpacking Capability
    • Suitable for 4K @ 60 Hz video resolution
  • V 3Link Enhanced Video interface
    • Supports 10.8/6.75/3.375 Gbps per channel; Up to 21.6 Gbps over dual channels
    • Coax/STP interconnect support
    • Port Splitting to enable Y-cable interfaces
  • Ultra-low latency control channel
    • Two I2C up to 1MHz (up to 3.4 MHz for local bus access)
    • High speed GPIOs
  • Compatibility
    • V 3Link Video and V 3Link Enhanced Video product families
    • V 3Link Vision product family
  • Security and diagnostics
    • Voltage and temperature monitoring
    • Line Fault Detection
    • BIST and pattern generation
    • CRC and error diagnostics
    • Unique ID for counterfeit protection
    • ECC on control bits
  • Advanced link robustness and EMC control
    • Data scrambling
    • Spread spectrum clocking generation (SSCG)
  • Low power operation
    • 1.8-V and 1.1-V dual power supply
  • Qualifications
    • ISO 10605 and IEC 61000-4-2 ESD compliant
    • 64 pin QFN Wettable flanks 9 mm x 9 mm
    • Temperature Range: −20℃ to +85℃
  • Single or dual port MIPI DSI receiver
    • Compliant to D-PHY v1.2 and DSI v1.3.1
    • Packed 16/18/24/30-bit RGB and 16-bit YCbCr
    • Loosely packed 18-bit RGB and 20-bit 4:2:2
    • 1 clock lane and 1-4 configurable data lanes per D-PHY Port
    • Up to 2.5 Gbps/lane with skew calibration
    • Supports data lane swap and polarity inversion
    • Supports both burst and non-burst mode
    • SuperFrame Unpacking Capability
    • Suitable for 4K @ 60 Hz video resolution
  • V 3Link Enhanced Video interface
    • Supports 10.8/6.75/3.375 Gbps per channel; Up to 21.6 Gbps over dual channels
    • Coax/STP interconnect support
    • Port Splitting to enable Y-cable interfaces
  • Ultra-low latency control channel
    • Two I2C up to 1MHz (up to 3.4 MHz for local bus access)
    • High speed GPIOs
  • Compatibility
    • V 3Link Video and V 3Link Enhanced Video product families
    • V 3Link Vision product family
  • Security and diagnostics
    • Voltage and temperature monitoring
    • Line Fault Detection
    • BIST and pattern generation
    • CRC and error diagnostics
    • Unique ID for counterfeit protection
    • ECC on control bits
  • Advanced link robustness and EMC control
    • Data scrambling
    • Spread spectrum clocking generation (SSCG)
  • Low power operation
    • 1.8-V and 1.1-V dual power supply
  • Qualifications
    • ISO 10605 and IEC 61000-4-2 ESD compliant
    • 64 pin QFN Wettable flanks 9 mm x 9 mm
    • Temperature Range: −20℃ to +85℃

TSER4905 is a MIPI DSI to V 3Link bridge device. In conjunction with an V 3Link deserializer, the chipset provides a high-speed serialized interface over low-cost 50Ω coax or STP cables. The TSER4905 is a D-PHY v1.2 compliant device that serializes a MIPI DSI input supporting video resolutions including 4K with 30-bit color depth. The V 3Link interface supports video and audio data transmission and full duplex control, including I2C and GPIO data over a single channel or dual channels. Consolidation of video data and control over two V 3Link lanes reduces the interconnect size and weight and simplifies system design. EMI is minimized by the use of low voltage differential signaling, data scrambling, SSCG, and randomization. This device can operate either in V 3Link Mode or V 3Link Enhanced Video Mode. In V 3Link Enhanced Video Mode, the device supports V 3Link Enhanced Video output over a single coax/STP cable operating up to 10.8 Gbps line rate or Dual Coax/STP cable operating up to 21.6 Gbps line rate, supporting 4K+ resolutions. In V 3Link mode, the devices supports up to 720p and 1080p resolutions with 24-bit color depth over a single/dual link. In Vision compatible mode, the device is interoperable with V 3Link Vision deserializers supporting resolutions up to 8MP+/40fps.

TSER4905 is a MIPI DSI to V 3Link bridge device. In conjunction with an V 3Link deserializer, the chipset provides a high-speed serialized interface over low-cost 50Ω coax or STP cables. The TSER4905 is a D-PHY v1.2 compliant device that serializes a MIPI DSI input supporting video resolutions including 4K with 30-bit color depth. The V 3Link interface supports video and audio data transmission and full duplex control, including I2C and GPIO data over a single channel or dual channels. Consolidation of video data and control over two V 3Link lanes reduces the interconnect size and weight and simplifies system design. EMI is minimized by the use of low voltage differential signaling, data scrambling, SSCG, and randomization. This device can operate either in V 3Link Mode or V 3Link Enhanced Video Mode. In V 3Link Enhanced Video Mode, the device supports V 3Link Enhanced Video output over a single coax/STP cable operating up to 10.8 Gbps line rate or Dual Coax/STP cable operating up to 21.6 Gbps line rate, supporting 4K+ resolutions. In V 3Link mode, the devices supports up to 720p and 1080p resolutions with 24-bit color depth over a single/dual link. In Vision compatible mode, the device is interoperable with V 3Link Vision deserializers supporting resolutions up to 8MP+/40fps.

下載 觀看有字幕稿的影片 影片
索取更多資訊

提供完整的產品規格表。立即索取

技術文件

找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 2
重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 TSER4905 4K DSI to V3Link Bridge Serializer datasheet PDF | HTML 2022/9/28
證書 TSER4905EVM EU RoHS Declaration of Conformity (DoC) 2022/9/15

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

應用軟體及架構

ALP — Analog LaunchPad Framework Utility

To get started with Analog LaunchPad (ALP) software: Download and install the ALP Framework Utility. Add new device profiles and example scripts with the ALP-PROFILE-UPDATE tool.
支援產品和硬體
支援軟體

ALP-PROFILE-UPDATE — Analog LaunchPad Profile Update Software

ALP Profile Update contains latest fixes and updates to ALP profiles. If you are installing for the first time please install ALP Profile Update after installing ALP Framework.
支援產品和硬體
封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFNP (RTD) 64 Ultra Librarian

訂購與品質

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片