DS90UB901Q-Q1
- 10 MHz to 43 MHz Input PCLK Support
- 160 Mbps to 688 Mbps Data Throughput
- Single Differential Pair Interconnect
- Bidirectional Control Interface Channel with I2C Support
- Embedded Clock with DC Balanced Coding to Support AC-Coupled Interconnects
- Capable to Drive up to 10 Meters Shielded Twisted-Pair
- I2C Compatible Serial Interface
- Single Hardware Device Addressing Pin
- 16-bit Data Payload with CRC (Cyclic Redundancy Check) for Checking Data Integrity
- Up to 6 Programmable GPIO's
- LOCK Output Reporting Pin and AT-SPEED BIST Diagnosis Feature to Validate Link Integrity
- Integrated Termination Resistors
- 1.8V- or 3.3V-Compatible Parallel Bus Interface
- Single Power Supply at 1.8V
- ISO 10605 ESD and IEC 61000-4-2 ESD Compliant
- Automotive Grade Product: AEC-Q100 Grade 2 Qualified
- Temperature Range −40°C to +105°C
- No Reference Clock Required on Deserializer
- Programmable Receive Equalization
- EMI/EMC Mitigation
- DES Programmable Spread Spectrum (SSCG) Outputs
- DES Receiver Staggered Outputs
All trademarks are the property of their respective owners.
The DS90UB901Q/DS90UB902Q chipset offers a FPD-Link III interface with a high-speed forward channel and a bidirectional control channel for data transmission over a single differential pair. The Serializer/Deserializer pair is targeted for direct connections between automotive camera systems and Host Controller/Electronic Control Unit (ECU). The primary transport sends 16 bits of image data over a single high-speed serial stream together with a low latency bidirectional control channel transport that supports I2C. Included with the 16-bit payload is a selectable data integrity option for CRC (Cyclic Redundancy Check) to monitor transmission link errors. Using TI’s embedded clock technology allows transparent full-duplex communication over a single differential pair, carrying asymmetrical bidirectional control information without the dependency of video blanking intervals. This single serial stream simplifies transferring a wide data bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. This significantly saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins.
In addition, the Deserializer inputs provide equalization control to compensate for loss from the media over longer distances. Internal DC balanced encoding/decoding is used to support AC-Coupled interconnects.
A Serializer standby function provides a low power-savings mode with a remote wake up capability for signaling of a remote device.
The Serializer is offered in a 32-pin WQFN (5mm x 5mm) package, and Deserializer is offered in a 40-pin WQFN (6mm x 6mm) package.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | DS90UB901Q/2Q 10-43MHz 14Bit Color FPD-Link III SER/DES datasheet (Rev. E) | 2013/4/16 | |||
| 應用說明 | I2C Communication Over FPD-Link III with Bidirectional Control Channel (Rev. A) | 2013/4/26 | ||||
| 應用說明 | Driving High-Speed Data Against the Traffic | 2011/7/11 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
ALP — Analog LaunchPad Framework Utility
ALP-PROFILE-UPDATE — Analog LaunchPad Profile Update Software
TIDA-00138 — 適用車用攝影機系統的雙絞線未壓縮數位視訊 SerDes
TIDA-00138 參考設計是高速序列攝影機介面，可將遠端車用攝影機模組連接至顯示器或機器視覺處理系統。其使用 TI 的 FPD-Link III SerDes 技術，透過雙絞線纜線傳輸未經壓縮的視訊資料和雙向控制訊號。 應用範例包括倒車攝影機、後視攝影機、環景系統、環景監視器、攝影機式停車輔助系統、取代後視鏡、盲點偵測。此設計整合了 DS90UB901Q-Q1 和 DS90UB902Q-Q1 裝置來建立解決方案。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN (RTV) | 32 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。