PLLATINUMSIM-SW — PLLatinum Sim Tool
PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.
The LMX8410L is a high-performance wideband (RF frequency input from 4 to 10 GHz) I/Q demodulator with an integrated LO and IF amplifier. With IIP3 of 28 dBm and NF of 15 dB (both at 5GHz), it provides excellent dynamic range for high performance applications. The device offers large complex bandwidth of 2.7 GHz for high data-rate applications.
The LMX8410L offers an automatic DC offset correction algorithm that reduces the offset to less than ±2 mV. Fine control of gain and phase of I and Q channels is enabled using SPI interface to achieve high image rejection.
The LMX8410L has a high level of integration providing high performance while saving board space and complexity. It integrates a wideband RF input balun, eliminating the need for external baluns. It integrates a high-performance PLL and VCO, eliminating the need for external LO and LO driver. The device also integrates an IF amplifier and several low noise LDOs, further simplifying the board.
The LMX8410L integrates a very low-noise synthesizer, with a PLL FOM of –236 dBc/Hz, providing up to 56.5-dBc DSB integrated noise at 5 GHz carrier. The LO allows for phase synchronization across multiple devices. The high-performance synthesizer output can be brought out to drive another stage or a data converter. The integrated LO can be bypassed for applications that share a common external LO.
| 유형 | 직함 | 날짜 | ||
|---|---|---|---|---|
| * | Data sheet | LMX8410L High-Performance Mixer With Integrated Synthesizer datasheet (Rev. A) | PDF | HTML | 2018/11/14 |
| Application note | Designing a High Performance 4-12GHz Direct Conversion Receiver with LMX8410L | 2019/02/18 | ||
| EVM User's guide | LMX8410LEVM User's Guide (Rev. A) | 2018/11/27 | ||
| Technical article | Can a clock generator act as a jitter cleaner? | PDF | HTML | 2017/03/23 | |
| Technical article | Don’t let bad reference signals destroy the phase noise in your PLL/synthesizer | PDF | HTML | 2017/01/10 | |
| Technical article | A survival guide to scaling your PLL loop filter design | PDF | HTML | 2016/11/22 | |
| Technical article | What to do when your PLL does not lock | PDF | HTML | 2016/07/12 | |
| Technical article | Issues with jitter, phase noise, lock time or spurs? Check the loop-filter bandwid | PDF | HTML | 2016/06/06 |
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| VQFN (RGZ) | 48 | Ultra Librarian |
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.
Bug fixes