SPRAAV1C May   2009  – March 2020 AM3703 , AM3715 , OMAP3503 , OMAP3515 , OMAP3525 , OMAP3530

 

  1.   PCB Design Guidelines for 0.4mm Package-On-Package (PoP) Packages, Part I
    1.     Trademarks
    2. 1  Using This Guide
    3. 2  A Word of Caution
    4. 3  A Team Sport
    5. 4  Be Wary of Quotes
    6. 5  Don’t Forget Your CAD Tools
    7. 6  Metric Vs English
    8. 7  PCB Fab Limits
    9. 8  Routing and Layer Stackup
    10. 9  OMAP35x 0.4mm Pitch
    11. 10 Pad Type
    12. 11 PCB Pad Dimensions for 0.4mm BGA Package
    13. 12 Multiple BGA Packages
    14. 13 Etch Traps and Heat Sinks
    15. 14 Vias and VIP
    16. 15 Laser Blind Vias
    17. 16 Filled Vias
    18. 17 Know Your Tools
    19. 18 BeagleBoard
    20. 19 BeagleBoard Views
      1. 19.1 Top Layer – Signal - Area Underneath the OMAP35x
      2. 19.2 Layer 2 – Ground
      3. 19.3 Layer 3 – Signal
      4. 19.4 Layer 4 – Signal
      5. 19.5 Layer 5 – Power (VDD2)
      6. 19.6 Layer 6 – Signal – Bottom Copper – Bottom Component Outlines
    21. 20 OMAP35x Decoupling
    22. 21 PCB Finishes for High Density Interconnect (HDI)
    23. 22 Real World Second Opinion
    24. 23 Acknowledgments
    25. 24 References
  2.   Revision History

12 Multiple BGA Packages

When BGA packages are placed on the top and bottom layers, do not place one BGA package directly underneath another BGA package. The temperature cycle board level reliability degrades if overlap of package footprint occurs.

bga1_praav1.gifFigure 9. Multiple BGA Pacbages on PCB Should Be Off-Set

Several studies, including the one referenced here, show that temperature cycle board-level-reliability (BLR) performance degrades if there is an overlap of package footprints. A small BGA opposite a large BGA or QFP, with its footprint within the unpopulated I/O shadow of the larger package, has temperature cycle performance similar to that of a single-side board assembly.

bga2_praav1.gifFigure 10. Multiple BGA Packages on PCB Should not Be Overlapped

For additional information on this concept, see section 5.4, Single-Sided Soldering and Double-Sided Soldering, of NEC’s, Semicondutor Device Mount Manual, http://www.necel.com/pkg/en/mount/ (this link is no longer good).