SLAU367P User guide | 德州仪器 TI.com.cn

SLAU367P October 2012 – April 2020 MSP430FR5041 , MSP430FR5043 , MSP430FR50431 , MSP430FR5847 , MSP430FR58471 , MSP430FR5848 , MSP430FR5849 , MSP430FR5857 , MSP430FR5858 , MSP430FR5859 , MSP430FR5867 , MSP430FR58671 , MSP430FR5868 , MSP430FR5869 , MSP430FR5870 , MSP430FR5872 , MSP430FR58721 , MSP430FR5887 , MSP430FR5888 , MSP430FR5889 , MSP430FR58891 , MSP430FR5922 , MSP430FR59221 , MSP430FR5947 , MSP430FR59471 , MSP430FR5948 , MSP430FR5949 , MSP430FR5957 , MSP430FR5958 , MSP430FR5959 , MSP430FR5962 , MSP430FR5964 , MSP430FR5967 , MSP430FR5968 , MSP430FR5969 , MSP430FR5969-SP , MSP430FR59691 , MSP430FR5970 , MSP430FR5972 , MSP430FR59721 , MSP430FR5986 , MSP430FR5987 , MSP430FR5988 , MSP430FR5989 , MSP430FR5989-EP , MSP430FR59891 , MSP430FR5992 , MSP430FR5994 , MSP430FR59941 , MSP430FR6005 , MSP430FR6007 , MSP430FR6035 , MSP430FR6037 , MSP430FR60371 , MSP430FR6041 , MSP430FR6043 , MSP430FR60431 , MSP430FR6045 , MSP430FR6047 , MSP430FR60471 , MSP430FR6820 , MSP430FR6822 , MSP430FR68221 , MSP430FR6870 , MSP430FR6872 , MSP430FR68721 , MSP430FR6877 , MSP430FR6879 , MSP430FR68791 , MSP430FR6887 , MSP430FR6888 , MSP430FR6889 , MSP430FR68891 , MSP430FR6920 , MSP430FR6922 , MSP430FR69221 , MSP430FR6927 , MSP430FR69271 , MSP430FR6928 , MSP430FR6970 , MSP430FR6972 , MSP430FR69721 , MSP430FR6977 , MSP430FR6979 , MSP430FR69791 , MSP430FR6987 , MSP430FR6988 , MSP430FR6989 , MSP430FR69891

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86
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262
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279
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281
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299
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322
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350
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358
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3. 378
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389
1. 390
2. 391
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3. 401
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4. 405
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417
1. 418
2. 419
3. 420
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422
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3. 448
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457
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470
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3. 478
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492
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499
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507
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528
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554
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625
1. 626
2. 627
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3. 647
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4. 649
5. 650
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671
1. 672
2. 673
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  8. 681
3. 682
  1. 683
4. 684
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694
1. 695
2. 696
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  3. 699
  4. 700
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    1. 703
3. 704
  1. 705
706
1. 707
2. 708
  1. 709
    1. 710
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  3. 712
    1. 713
      1. 714
    2. 715
    3. 716
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      1. 718
    5. 719
  4. 720
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      1. 722
    2. 723
  5. 724
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      1. 726
      2. 727
      3. 728
  6. 729
    1. 730
    2. 731
      1. 732
3. 733
  1. 734
  2. 735
  3. 736
  4. 737
  5. 738
  6. 739
740
1. 741
  1. 742
2. 743
  1. 744
    1. 745
    2. 746
  2. 747
  3. 748
    1. 749
      1. 750
    2. 751
    3. 752
    4. 753
      1. 754
    5. 755
  4. 756
    1. 757
      1. 758
    2. 759
      1. 760
      2. 761
  5. 762
    1. 763
      1. 764
      2. 765
      3. 766
  6. 767
    1. 768
    2. 769
    3. 770
3. 771
  1. 772
  2. 773
  3. 774
  4. 775
  5. 776
  6. 777
778
1. 779
780
1. 781
2. 782
  1. 783
  2. 784
  3. 785
  4. 786
    1. 787
  5. 788
  6. 789
3. 790
  1. 791
  2. 792
  3. 793
  4. 794
  5. 795
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  7. 797
  8. 798
  9. 799
  10. 800
  11. 801
  12. 802
  13. 803
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  16. 806
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  23. 813
  24. 814
  25. 815
  26. 816
  27. 817
  28. 818
  29. 819
  30. 820
  31. 821
822
1. 823
2. 824
  1. 825
  2. 826
  3. 827
  4. 828
  5. 829
  6. 830
    1. 831
  7. 832
    1. 833
      1. 834
  8. 835
    1. 836
    2. 837
    3. 838
  9. 839
3. 840
  1. 841
    1. 842
    2. 843
    3. 844
  2. 845
    1. 846
4. 847
  1. 848
  2. 849
  3. 850
  4. 851
  5. 852
  6. 853
  7. 854
  8. 855
  9. 856
  10. 857
  11. 858
  12. 859
  13. 860
  14. 861
  15. 862
  16. 863
  17. 864
  18. 865
  19. 866
  20. 867
  21. 868
  22. 869
  23. 870
  24. 871
  25. 872
  26. 873
  27. 874
  28. 875
  29. 876
  30. 877
  31. 878
  32. 879
  33. 880
  34. 881
  35. 882
  36. 883
  37. 884
  38. 885
  39. 886
  40. 887
  41. 888
  42. 889
  43. 890
  44. 891
  45. 892
  46. 893
  47. 894
  48. 895
  49. 896
  50. 897
  51. 898
  52. 899
900
1. 901
2. 902
3. 903
  1. 904
  2. 905
  3. 906
    1. 907
      1. 908
    2. 909
      1. 910
  4. 911
    1. 912
  5. 913
    1. 914
    2. 915
  6. 916
  7. 917
    1. 918
  8. 919
  9. 920
    1. 921
    2. 922
  10. 923
    1. 924
    2. 925
  11. 926
    1. 927
    2. 928
  12. 929
  13. 930
  14. 931
  15. 932
    1. 933
    2. 934
    3. 935
    4. 936
      1. 937
  16. 938
4. 939
  1. 940
  2. 941
  3. 942
  4. 943
  5. 944
  6. 945
  7. 946
  8. 947
  9. 948
  10. 949
  11. 950
  12. 951
952
1. 953
2. 954
3. 955
  1. 956
  2. 957
  3. 958
    1. 959
    2. 960
  4. 961
    1. 962
  5. 963
    1. 964
    2. 965
  6. 966
    1. 967
  7. 968
  8. 969
    1. 970
    2. 971
    3. 972
      1. 973
4. 974
  1. 975
  2. 976
  3. 977
  4. 978
  5. 979
  6. 980
  7. 981
  8. 982
5. 983
  1. 984
  2. 985
  3. 986
  4. 987
  5. 988
  6. 989
  7. 990
  8. 991
992
1. 993
2. 994
3. 995
  1. 996
  2. 997
  3. 998
    1. 999
    2. 1000
    3. 1001
  4. 1002
    1. 1003
    2. 1004
  5. 1005
    1. 1006
      1. 1007
      2. 1008
      3. 1009
    2. 1010
      1. 1011
      2. 1012
      3. 1013
    3. 1014
  6. 1015
  7. 1016
    1. 1017
    2. 1018
    3. 1019
  8. 1020
    1. 1021
    2. 1022
  9. 1023
    1. 1024
    2. 1025
  10. 1026
  11. 1027
    1. 1028
    2. 1029
    3. 1030
    4. 1031
    5. 1032
      1. 1033
4. 1034
  1. 1035
  2. 1036
  3. 1037
  4. 1038
  5. 1039
  6. 1040
  7. 1041
  8. 1042
  9. 1043
  10. 1044
  11. 1045
  12. 1046
  13. 1047
  14. 1048
  15. 1049
  16. 1050
  17. 1051
1052
1. 1053
2. 1054
  1. 1055
  2. 1056
    1. 1057
    2. 1058
    3. 1059
3. 1060
  1. 1061
1062
1. 1063
2. 1064
  1. 1065
    1. 1066
  2. 1067
    1. 1068
  3. 1069
  4. 1070
  5. 1071
  6. 1072
    1. 1073
    2. 1074
    3. 1075
  7. 1076
  8. 1077
    1. 1078
    2. 1079
    3. 1080
    4. 1081
    5. 1082
    6. 1083
  9. 1084
  10. 1085
  11. 1086
  12. 1087
  13. 1088
  14. 1089
    1. 1090
    2. 1091
3. 1092
  1. 1093
  2. 1094
  3. 1095
  4. 1096
  5. 1097
  6. 1098
  7. 1099
  8. 1100
  9. 1101
  10. 1102
  11. 1103
  12. 1104
  13. 1105
  14. 1106
  15. 1107
1108
1. 1109
2. 1110
  1. 1111
  2. 1112
  3. 1113
  4. 1114
  5. 1115
  6. 1116
  7. 1117
  8. 1118
  9. 1119
3. 1120
  1. 1121
  2. 1122
  3. 1123
  4. 1124
  5. 1125
  6. 1126
1127
1. 1128
2. 1129
  1. 1130
    1. 1131
    2. 1132
  2. 1133
  3. 1134
  4. 1135
    1. 1136
    2. 1137
    3. 1138
  5. 1139
    1. 1140
    2. 1141
    3. 1142
  6. 1143
  7. 1144
    1. 1145
  8. 1146
  9. 1147
  10. 1148
  11. 1149
  12. 1150
  13. 1151
3. 1152
  1. 1153
  2. 1154
  3. 1155
  4. 1156
  5. 1157
  6. 1158
  7. 1159
  8. 1160
  9. 1161
  10. 1162
  11. 1163
1164
1. 1165
2. 1166
  1. 1167
    1. 1168
    2. 1169
    3. 1170
    4. 1171
    5. 1172
    6. 1173
    7. 1174
  2. 1175
    1. 1176
    2. 1177
    3. 1178
    4. 1179
    5. 1180
    6. 1181
    7. 1182
    8. 1183
  3. 1184
  4. 1185
  5. 1186
    1. 1187
    2. 1188
    3. 1189
    4. 1190
    5. 1191
  6. 1192
  7. 1193
    1. 1194
    2. 1195
    3. 1196
  8. 1197
    1. 1198
      1. 1199
      2. 1200
    2. 1201
    3. 1202
3. 1203
  1. 1204
  2. 1205
  3. 1206
  4. 1207
  5. 1208
  6. 1209
  7. 1210
  8. 1211
  9. 1212
  10. 1213
  11. 1214
  12. 1215
  13. 1216
  14. 1217
  15. 1218
  16. 1219
  17. 1220
  18. 1221
  19. 1222
  20. 1223
  21. 1224
  22. 1225
  23. 1226
  24. 1227
1228
1. 1229
2. 1230
  1. 1231
  2. 1232
  3. 1233
  4. 1234
  5. 1235
  6. 1236
  7. 1237
3. 1238
1239

9.7.5 MPUSAM Register

Memory Protection Unit Segmentation Access Management Register

Figure 9-11 MPUSAM Register

15	14	13	12	11	10	9	8
MPUSEGIVS	MPUSEGIXE	MPUSEGIWE	MPUSEGIRE	MPUSEG3VS	MPUSEG3XE	MPUSEG3WE	MPUSEG3RE
rw-[0]	rw-[1]	rw-[1]	rw-[1]	rw-[0]	rw-[1]	rw-[1]	rw-[1]

7	6	5	4	3	2	1	0
MPUSEG2VS	MPUSEG2XE	MPUSEG2WE	MPUSEG2RE	MPUSEG1VS	MPUSEG1XE	MPUSEG1WE	MPUSEG1RE
rw-[0]	rw-[1]	rw-[1]	rw-[1]	rw-[0]	rw-[1]	rw-[1]	rw-[1]

Table 9-13 MPUSAM Register Description

Bit	Field	Type	Reset	Description
15	MPUSEGIVS	RW	0h	MPU User Information Memory Segment Violation Select. This bit selects if additional to the interrupt flag a PUC must be executed on illegal access to User Information Memory 0b = Violation in User Information Memory asserts the MPUSEGIIFG bit and executes a SNMI if enabled by MPUSEGIE =1 1b = Violation in User Information Memory asserts the MPUSEGIIFG bit and executes a PUC
14	MPUSEGIXE	RW	1h	MPU User Information Memory Segment Execute Enable. If set, this bit enables execution on User Information Memory 0b = Execute code on User Information Memory causes a violation 1b = Execute code on User Information Memory is allowed
13	MPUSEGIWE	RW	1h	MPU User Information Memory Segment Write Enable. If set, this bit enables write access on User Information Memory 0b = Write on User Information Memory causes a violation 1b = Write on User Information Memory is allowed
12	MPUSEGIRE	RW	1h	MPU User Information Memory Segment Read Enable. If set, this bit enables read access on User Information Memory 0b = Read on User Information Memory causes a violation if MPUSEGIWE=MPUSEGIXE=0 1b = Read on User Information Memory is allowed
11	MPUSEG3VS	RW	0h	MPU Main Memory Segment 3 Violation Select. This bit selects if additional to the interrupt flag a PUC must be executed on illegal access to Main Memory segment 3 0b = Violation in Main Memory Segment 3 asserts the MPUSEG3IFG bit and executes a SNMI if enabled by MPUSEGIE =1 1b = Violation in Main Memory Segment 3 asserts the MPUSEG3IFG bit and executes a PUC
10	MPUSEG3XE	RW	1h	MPU Main Memory Segment 3 Execute Enable. If set this bit enables execution on Main Memory segment 3 0b = Execute code on Main Memory Segment 3 causes a violation 1b = Execute code on Main Memory Segment 3 is allowed
9	MPUSEG3WE	RW	1h	MPU Main Memory Segment 3 Write Enable. If set this bit enables write access on Main Memory segment 3 0b = Write on Main Memory Segment 3 causes a violation 1b = Write on Main Memory Segment 3 is allowed
8	MPUSEG3RE	RW	1h	MPU Main Memory Segment 3 Read Enable. If set this bit enables read access on Main Memory segment 3 0b = Read on Main Memory Segment 3 causes a violation if MPUSEG3WE = MPUSEG3XE = 0 1b = Read on Main Memory Segment 3 is allowed
7	MPUSEG2VS	RW	0h	MPU Main Memory Segment 2 Violation Select. This bit selects if additional to the interrupt flag a PUC must be executed on illegal access to Main Memory segment 2 0b = Violation in Main Memory Segment 2 asserts the MPUSEG2IFG bit and executes a SNMI if enabled by MPUSEGIE =1 1b = Violation in Main Memory Segment 2 asserts the MPUSEG2IFG bit and executes a PUC
6	MPUSEG2XE	RW	1h	MPU Main Memory Segment 2 Execute Enable. If set this bit enables execution on Main Memory segment 2 0b = Execute code on Main Memory Segment 2 causes a violation 1b = Execute code on Main Memory Segment 2 is allowed
5	MPUSEG2WE	RW	1h	MPU Main Memory Segment 2 Write Enable. If set this bit enables write access on Main Memory segment 2 0b = Write on Main Memory Segment 2 causes a violation 1b = Write on Main Memory Segment 2 is allowed
4	MPUSEG2RE	RW	1h	MPU Main Memory Segment 2 Read Enable. If set this bit enables read access on Main Memory segment 2 0b = Read on Main Memory Segment 2 causes a violation if MPUSEG2WE = MPUSEG2XE = 0 1b = Read on Main Memory Segment 2 is allowed
3	MPUSEG1VS	RW	0h	MPU Main Memory Segment 1 Violation Select. This bit selects if additional to the interrupt flag a PUC must be executed illegal access to Main Memory segment 1 0b = Violation in Main Memory Segment 1 asserts the MPUSEG1IFG bit and executes a SNMI if enabled by MPUSEGIE = 1 1b = Violation in Main Memory Segment 1 asserts the MPUSEG1IFG bit and executes a PUC
2	MPUSEG1XE	RW	1h	MPU Main Memory Segment 1 Execute Enable. If set this bit enables execution on Main Memory segment 1 0b = Execute code on Main Memory Segment 1 causes a violation 1b = Execute code on Main Memory Segment 1 is allowed
1	MPUSEG1WE	RW	1h	MPU Main Memory Segment 1 Write Enable. If set this bit enables write access on Main Memory segment 1 0b = Write on Main Memory Segment 1 causes a violation 1b = Write on Main Memory Segment 1 is allowed
0	MPUSEG1RE	RW	1h	MPU Main Memory Segment 1 Read Enable. If set this bit enables read access on Main Memory segment 1 0b = Read on Main Memory Segment 1 causes a violation if MPUSEG1WE = MPUSEG1XE = 0 1b = Read on Main Memory Segment 1 is allowed