The JESD204C receiver is a critical aspect of the DAC39RF10-SP, as this is how massive amounts of digital data are transmitted from the FPGA (or other logic device) to the DAC. During all beam runs, we were unable to observe any link-down events or ‘missing’ or ‘muted’ tones while monitoring the DAC output using the ADC12DJ5200RFEVM with HSDCPRO set up in continuous-capture mode. However, link-down alarm sticky bits were thrown during runs. This indicates that any link-down event that occurred auto-recovered, and without user intervention. In the tested 64b/66b encoding mode, this recovery time is nearly instant. In 8b/10b encoding mode (sometimes referred to as JESD204B), which was not tested, the DAC’s SYNCb signal is used to reset the transmitter and the time to bring the link back up depends on the user’s implementation of the protocol.