The DAC was configured in an active conversion mode then all SPI registers were read, and the register contents were stored. After the beam run, the read-all register command was initiated, and the register contents were stored yet again. The pre- and post- SPI register dumps were then compared to ensure no values were changing due to ion strikes.

The only values changing are sticky alarms that need to be cleared manually (for example, 0x107 JESD_STATUS; 0x160–0x16F LANE_ERR; 0x410 SYNC_STATUS; 0x430 SYS_ALM). This result is not unexpected as these are read-only SPI status registers associated with JESD204C physical or link layers or write-to-clear status bits that get set when certain events occur in upset-vulnerable logic (an upset can cause an event to occur that gets detected and sets the sticky bit). All user programmable device configuration and fuse-backed register values remain unchanged after beam runs. See the appendix for more details.