ZHCSPC5 October   2022 LM51231-Q1

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Device Enable/Disable (EN, VH Pin)
      2. 7.3.2  High Voltage VCC Regulator (BIAS, VCC Pin)
      3. 7.3.3  Light Load Switching Mode Selection (MODE Pin)
      4. 7.3.4  VOUT Range Selection (RANGE Pin)
      5. 7.3.5  Line Undervoltage Lockout (UVLO Pin)
      6. 7.3.6  Fast Restart using VCC HOLD (VH Pin)
      7. 7.3.7  Adjustable Output Regulation Target (VOUT, TRK, VREF Pin)
      8. 7.3.8  Overvoltage Protection (VOUT Pin)
      9. 7.3.9  Power Good Indicator (PGOOD Pin)
      10. 7.3.10 Dynamically Programmable Switching Frequency (RT)
      11. 7.3.11 External Clock Synchronization (SYNC Pin)
      12. 7.3.12 Programmable Spread Spectrum (DITHER Pin)
      13. 7.3.13 Programmable Soft-start (SS Pin)
      14. 7.3.14 Wide Bandwidth Transconductance Error Amplifier and PWM (TRK, COMP Pin)
      15. 7.3.15 Current Sensing and Slope Compensation (CSP, CSN Pin)
      16. 7.3.16 Constant Peak Current Limit (CSP, CSN Pin)
      17. 7.3.17 Maximum Duty Cycle and Minimum Controllable On-time Limits
      18. 7.3.18 MOSFET Drivers, Integrated Boot Diode, and Hiccup Mode Fault Protection (LO, HO, HB Pin)
      19. 7.3.19 Thermal Shutdown Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Status
        1. 7.4.1.1 Shutdown Mode
        2. 7.4.1.2 Configuration Mode
        3. 7.4.1.3 Active Mode
        4. 7.4.1.4 Bypass Mode
          1. 7.4.1.4.1 Bypass DE mode
          2. 7.4.1.4.2 Bypass FPWM
      2. 7.4.2 Light Load Switching Mode
        1. 7.4.2.1 Forced PWM (FPWM) Mode
        2. 7.4.2.2 Diode Emulation (DE) Mode
        3. 7.4.2.3 Forced Diode Emulation Operation in FPWM Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Ideas
      4. 8.2.4 Application Curves
    3. 8.3 System Example
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 接收文档更新通知
    2. 9.2 支持资源
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 术语表
  10. 10Mechanical, Packaging, and Orderable Information

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7.3.2 High Voltage VCC Regulator (BIAS, VCC Pin)

The device features a high voltage 5-V VCC regulator which is sourced from the BIAS pin. The internal VCC regulator turns on 50 μs after the device is enabled, and 120 μs device configuration starts when VCC is above VCC UVLO threshold (VVCC-UVLO). The device configuration is reset when the device shuts down or VCC falls down below VVCC-UVLO-FALLING. The preferred way to reconfigure the device is to shut down the device. During configuration time, the VOUT range is selected.

The high voltage VCC regulator allows the connection of the BIAS pin directly to supply voltages from 3.8 V to 42 V. When BIAS is less than the 5-V VCC regulation target (VVCC-REG), the VCC output tracks the BIAS pin voltage with a small dropout voltage which is caused by 1.7-Ω resistance of the VCC regulator.

The recommended VCC capacitor value is 4.7 μF. The VCC capacitor should be populated between VCC and PGND as close to the device. The recommended BIAS capacitor value is 1.0 μF. The BIAS capacitor must be populated between BIAS and PGND close to the device.

GUID-4365D6C1-CF05-4E12-983B-CC23FDF5DE0F-low.gifFigure 7-2 High Voltage VCC Regulator

The VCC regulator features a VCC current limit function that prevents device damage when the VCC pin is shorted to ground accidentally. The minimum sourcing capability of the VCC regulator is 100 mA (IVCC-CL) during either the device configuration time or active mode operation. The minimum sourcing capability of the VCC regulator is reduced to 1 mA when EN/UVLO is less than VEN and VH is greater than VSYNC. The VCC regulator supplies the internal drivers and other internal circuits. The external MOSFETs must be carefully selected to make the driver current consumption less than IVCC-CL. The driver current consumption can be calculated in Equation 1.

Equation 1. IG = 2 × QG@5V × fSW

where

  • QG@5V is the N-channel MOSFET gate charge at 5 V gate-source voltage

If VIN operation below 3.8 V is required, the BIAS pin can be connected to the output of the boost converter (VLOAD). By connecting the BIAS pin to VLOAD, the boost converter input voltage (VSUPPLY) can drop down to 0.8 V if the BIAS pin is greater than 3.8 V. See Section 7.3.17 for more detailed information about the minimum VSUPPLY.