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UC2572

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UC2572

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Rating Catalog Topology Inverting Iout (max) (A) 10 Vin (max) (V) 35 Vin (min) (V) 4.2 Vout (max) (V) -1 Vout (min) (V) -70 Features Nonsynchronous rectification, UVLO fixed Duty cycle (max) (%) 100 Iq (typ) (A) 0.009 Operating temperature range (°C) -40 to 85
Rating Catalog Topology Inverting Iout (max) (A) 10 Vin (max) (V) 35 Vin (min) (V) 4.2 Vout (max) (V) -1 Vout (min) (V) -70 Features Nonsynchronous rectification, UVLO fixed Duty cycle (max) (%) 100 Iq (typ) (A) 0.009 Operating temperature range (°C) -40 to 85
SOIC (D) 8 29.4 mm² (4.9 mm × 6 mm)
  • Simple Single Inductor Flyback PWM for Negative Voltage Generation
  • Drives External PMOS Switch
  • Contains UVLO Circuit
  • Includes Pulse-by-Pulse Current Limit
  • Low 50uA Sleep Mode Current
  • Simple Single Inductor Flyback PWM for Negative Voltage Generation
  • Drives External PMOS Switch
  • Contains UVLO Circuit
  • Includes Pulse-by-Pulse Current Limit
  • Low 50uA Sleep Mode Current

The UC3572 is a negative output flyback pulse width modulator which converts a positive input voltage to a regulated negative output voltage. The chip is optimized for use in a single inductor negative flyback switching converter employing an external PMOS switch. The block diagram consists of a precision reference, an error amplifier configured for voltage mode operation, an oscillator, a PWM comparator with latching logic, and a 0.5A peak gate driver. The UC3572 includes an undervoltage lockout circuit to insure sufficient input supply voltage is present before any switching activity can occur, and a pulse-by-pulse current limit. Output current can be sensed and limited to a user determined maximum value. The UVLO circuit turns the chip off when the input voltage is below the UVLO threshold. In addition, a sleep comparator interfaces to the UVLO circuit to turn the chip off. This reduces the supply current to only 50uA, making the UC3572 ideal for battery powered applications.

The UC3572 is a negative output flyback pulse width modulator which converts a positive input voltage to a regulated negative output voltage. The chip is optimized for use in a single inductor negative flyback switching converter employing an external PMOS switch. The block diagram consists of a precision reference, an error amplifier configured for voltage mode operation, an oscillator, a PWM comparator with latching logic, and a 0.5A peak gate driver. The UC3572 includes an undervoltage lockout circuit to insure sufficient input supply voltage is present before any switching activity can occur, and a pulse-by-pulse current limit. Output current can be sensed and limited to a user determined maximum value. The UVLO circuit turns the chip off when the input voltage is below the UVLO threshold. In addition, a sleep comparator interfaces to the UVLO circuit to turn the chip off. This reduces the supply current to only 50uA, making the UC3572 ideal for battery powered applications.
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* 数据表 Negative Output Flyback Pulse Width Modulator 数据表 (Rev. A) 2001-8-29

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