ZHCAFB0 May 2025 TAC5212
本节介绍录音路径上主要 ASI 混频器的实现示例。以下示例代码是在 TAC5112EVM-K 评估模块上使用 PurePath™ Console 3 执行测试。对于主要 ASI 混频器,器件提供四路输入信号:
捕获主要 ASI 总线 DOUT 上产生的输出,如图 2-3 所示。
#FS refers to Full-Scale
w a0 00 00 #Page 0
w a0 01 01 #SW Reset
d 01
w a0 00 00 #Page 0
w a0 02 09 #Exit Sleep Mode with DREG and VREF Enabled
d 10
w a0 1a 30 #PASI on TDM protocol with 32-bit word length
w a0 4d 00 #VREF set to 2.75V for 2Vrms differential fullscale input
w a0 50 00 #ADC Channel 1 configured for AC-coupled differential input with 5kOhm input impedance and audio bandwidth
w a0 55 00 #ADC Channel 2 configured for AC-coupled differential input with 5kOhm input impedance and audio bandwidth
w a0 0a 41 #Configure GPIO1 as PDMCLK
w a0 0b 10 #Configure GPIO2 as GPI
w a0 13 12 #Source PDM CH3/CH4 data from GPIO2; CH3 on PDMCLK rising edge, CH4 on PDMCLK falling edge
w a0 35 00 #PDMCLK = 3.072MHz
w a0 1e 20 #PASI TX Channel 1 on TDM Slot 0
w a0 1f 21 #PASI TX Channel 2 on TDM Slot 0
w a0 20 22 #PASI TX Channel 3 on TDM Slot 2
w a0 21 23 #PASI TX Channel 4 on TDM Slot 3
w a0 00 01 #Page 1
w a0 2c 20 #Enable ADC Channel Mixer
#IN1 = ADC CH1 = 0.2Vrms, 1kHz analog signal (0.1FS)
#IN2 = ADC CH2 = 0.5Vrms, 1kHz analog signal (0.25FS)
#IN3 = PDM CH3 = 0.1FS, 100Hz PDM signal (0.1FS)
#IN4 = PDM CH4 = 0.2FS, 5kHZ PDM signal (0.2FS)
w a0 00 0a #Page 10
#Configure Mixer for OUT1 = 0.3*IN1 + 0.5*IN3
w a0 08 26 66 66 66 #a1 = 0.3
w a0 0c 00 00 00 00 #b1 = 0
w a0 10 40 00 00 00 #c1 = 0.5
w a0 14 00 00 00 00 #d1 = 0
#Configure Mixer for OUT2 = 0.5*IN2 + 0.3*IN4
w a0 18 00 00 00 00 #a2 = 0
w a0 1c 40 00 00 00 #b2 = 0.4
w a0 20 00 00 00 00 #c2 = 0
w a0 24 26 66 66 66 #d2 = 0.3
#Configure Mixer for OUT3 = 0.2*IN1 + 0.5*IN2 + 0.4*IN3 + 0.3*IN4
w a0 28 19 99 99 9a #a3 = 0.2
w a0 2c 40 00 00 00 #b3 = 0.5
w a0 30 33 33 33 33 #c3 = 0.4
w a0 34 26 66 66 66 #d3 = 0.3
#Configure Mixer for OUT4 = 0.5*IN1 + 0.2*IN2 + 0.3*IN3 + 0.4*IN4
w a0 38 40 00 00 00 #a4 = 0.5
w a0 3c 19 99 99 9a #b4 = 0.2
w a0 40 26 66 66 66 #c4 = 0.3
w a0 44 33 33 33 33 #d3 = 0.4
w a0 00 00 #Page 0
w a0 76 f0 #ADC Channels 1-4 Enabled
w a0 78 80 #ADC Powered Up