SPRUIQ4 May   2019 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379D-Q1 , TMS320F28379S

 

  1.   Introduction
    1.     Trademarks
    2.     Overview
  2. 1Getting Familiar With the Kit
    1. 1.1 Contents of the Kit
    2. 1.2 IDDK EVM Features
  3. 2Hardware Overview
    1. 2.1  IDDK Evaluation Board
    2. 2.2  Functional Blocks
    3. 2.3  Processor Section
    4. 2.4  Control Processor Slot – H1
    5. 2.5  Expansion Processor Slots
      1. 2.5.1 Real-time Connectivity – H7
      2. 2.5.2 Functional Safety – H8
    6. 2.6  Position Encoder Suite
      1. 2.6.1 QEP
      2. 2.6.2 Resolver
      3. 2.6.3 Sin-Cos Encoder
      4. 2.6.4 BiSS / EnDat Encoder
      5. 2.6.5 TI Design Interface Connector
    7. 2.7  Current Sensor Suite
      1. 2.7.1 Shunt Current Sensing
      2. 2.7.2 LEM Current Sensing
      3. 2.7.3 Sigma-Delta Current Sensing
      4. 2.7.4 Overcurrent Protection
    8. 2.8  Power Supplies and GND Plane Configurations
    9. 2.9  Rectifier and Inverter
      1. 2.9.1 Rectifier Stage
        1. 2.9.1.1 Connecting the External DC Supply to the DC Link
        2. 2.9.1.2 Connecting Rectifier Output to DC Link
      2. 2.9.2 Inverter Stage
    10. 2.10 DACs
    11. 2.11 Power Stage Disable Circuits
  4. 3Hardware Resource Mapping
    1. 3.1 Digital Signal Mapping
    2. 3.2 Analog Signal Mapping
    3. 3.3 Jumpers and Switches
    4. 3.4 Headers and Connectors

3.1 Digital Signal Mapping

Table 3-1 shows the functional mapping of various digital signals connected to control processor on H1.

Table 3-1 Digital Signal Mapping on Control Card H1

IDDK Signal Name MCU GPIO MCU Peripheral Associated With GPIO Function Reserved
PWM-1A 0 EPWM-1A PWM for inverter phase U high side
PWM-1B 1 EPWM-1B PWM for inverter phase U low side
PWM-2A 2 EPWM-2A PWM for inverter phase V high side
PWM-2B 3 EPWM-2B PWM for inverter phase V low side
PWM-3A 4 EPWM-3A PWM for inverter phase W high side
PWM-3B 5 EPWM-3B PWM for inverter phase W low side
En-Clk 6 ABS ENC-CLK Absolute Encoder Clock out
C1-SPIB-CLK 7 PEM CLK Encoder SPI Clock out
SD-CLK-PWM5A 8 EPWM-5A Sigma-delta clk for motor phase current
SD-CLK-PWM5B 9 EPWM-5B Sigma-delta clk for Vdc bus
RES-PWM6A 10 EPWM-6A PWM for resolver excitation (option)
AdcSOCXbarOut 11 OUTPUTXBAR7 ADC SoC pulse √
En-PwrPG 12 GPIO input Power Good Input from Ext Enc Interface
----- 13
CompOutSC-B 14 OUTPUTXBAR3 SinCos Enc Interface – B √
CompOutSC-A 15 OUTPUTXBAR4 SinCos Enc Interface – A √
C1-SPIA-SIMO 16 SPIA SPI signal to CC2 (Connectivity card)
C1-SPIA-SOMI 17 SPIA SPI signal to CC2 (Connectivity card)
C1-SPIA-CLK 18 SPIA SPI signal to CC2 (Connectivity card)
C1-SPIA-STE 19 SPIA SPI signal to CC2 (Connectivity card)
C1-QEP1-A 20 QEP1 QEP signal
C1-QEP1-B 21 QEP1 QEP signal
AdcSOCXbarOut 22 QEP1 QEP signal
C1-QEP1-I 23 QEP1 QEP signal
En-DO 24 SPIB SPI Interface for Abs Encoder
En-DI 25 SPIB SPI Interface for Abs Encoder
C1-SPIB-CLK 26 SPIB SPI Interface for Abs Encoder
C1-SPIB-STE 27 SPIB SPI Interface for Abs Encoder
SCI RX (on CC) 28 SCIA Isolated SCI on control card
SCI TX (on CC) 29 SCIA Isolated SCI on control card
C1-CAN-TX 30 CANA Isolated CAN Interface
C1-CAN-RX 31 CANA Isolated CAN Interface
En-PwrEn 32 GPIO output Power Enable for Abs Encoder
------- 33
(LED LD3) 34 (GPIO) (LED lighting)
En-TxEn PEM TX En Tx Enable for Abs Encoder
------- 35 to 38
En-PwrFault 39 GPIO input Power Fault Input from Ext Enc I/f √
TZn 40 PWM TRIP ZONE Overcurrent Protection
CLR FAULT 41 Overcurrent Protection – Clear
------- 42
------- 43
En-TxClkEn 44 GPIO output Enable TX clk for Abs Encoder √
GPIO 45 GPIO Brought out to H15
STO-PB 46 GPIO Safe Torque Off signal from CC2/3 √
------- 47
SD-Data-V 48 SD1 SD data for phase current V
SD-Clk-PWM5A 49 SD1 SD clk for phase current V
SD-Data-W 50 SD2 SD data for phase current W
SD-Clk-PWM5A 51 SD2 SD clk for phase current W
SD-Data-Volt 52 SD3 SD data for Vdc
SD-Clk-PWM5B 53 SD3 SD clk for Vdc
CompOutSC-A 54 QEP2 QEP signal (SinCos)
CompOutSC-B 55 QEP2 QEP signal (SinCos)
AdcSOCXbarOut 56 QEP2 QEP signal (SinCos)
CompOutSC-R 57 QEP2 QEP signal (SinCos)
TripCC1 58 GPIO output Inverter Trip control
CompOutSC-R 59 OUTPUTXBAR2 SinCos Enc Interface - R √
------- 60-68
C1-SPIC-SIMO 69 SPIC Comm channel to Safety CC – H8 √
C1-SPIC-SOMI 70 SPIC Comm channel to Safety CC – H8 √
C1-SPIC-CLK 71 SPIC Comm channel to Safety CC – H8 √
C1-SPIC-STE 72 SPIC Comm channel to Safety CC – H8 √
------- 73 to 83
C1-MDX 84 McBSPB Isolated McBSP connection from CC – H7 √
C1-MDR 85 McBSPB Isolated McBSP connection from CC – H7 √
C1-MCLKX 86 McBSPB Isolated McBSP connection from CC – H7 √
C1-MFSX 87 McBSPB Isolated McBSP connection from CC – H7 √
------- 88 and above