SPRUIF3B May 2017 – March 2019 DRA790 , DRA791 , DRA793 , DRA797
The EVM supports a mini-PCIe (single lane) interface for connecting with a variety of external modules. An onboard clock generator, CDCM9102, provides the 100-MHz reference clock to both the SoC and attached modules. The EVM supports two different PCIe reset configurations; select one using the DIP switch SW8 position 8. The default setting of on provides the SoC the ability to reset the PCIe peripheral. The switch setting of off provides the PCIe peripheral the ability to reset the SoC.