EPWM1B and EPWM2B are routed to CLB TILE1 and TILE2, respectively, before outputting as external signals. Taking EPWM1B as example, it is routed to CLB1 by Global Signal Bus via Input Mux of Tile 1. The trip signal, sourced from the specific GPIO, needs to take 2 input bits, to form the predefined logic later.

To import these three signals into the CLB (BOUNDARY INz, where z is any number between 0–7) from the GPIOs, INPUT X-BAR and CLB X-BAR configurations are needed.

    // Configure CLB-XBAR AUXSIG0 as INPUTXBAR1
    //
    XBAR_setCLBMuxConfig(XBAR_AUXSIG0, XBAR_CLB_MUX01_INPUTXBAR1);
    XBAR_enableCLBMux(XBAR_AUXSIG0, XBAR_MUX01);
    
// CLB tile 1 configuration
    CLB_configLocalInputMux(CLB1_BASE, CLB_IN0, CLB_LOCAL_IN_MUX_GLOBAL_IN);
    CLB_configLocalInputMux(CLB1_BASE, CLB_IN1, CLB_LOCAL_IN_MUX_GLOBAL_IN);
    CLB_configLocalInputMux(CLB1_BASE, CLB_IN2, CLB_LOCAL_IN_MUX_GLOBAL_IN);

    CLB_configGlobalInputMux(CLB1_BASE, CLB_IN0, CLB_GLOBAL_IN_MUX_CLB_AUXSIG0);
    CLB_configGlobalInputMux(CLB1_BASE, CLB_IN1, CLB_GLOBAL_IN_MUX_CLB_AUXSIG0);
    CLB_configGlobalInputMux(CLB1_BASE, CLB_IN2, CLB_GLOBAL_IN_MUX_EPWM1B);

    CLB_configGPInputMux(CLB1_BASE, CLB_IN0, CLB_GP_IN_MUX_EXTERNAL);
    CLB_configGPInputMux(CLB1_BASE, CLB_IN1, CLB_GP_IN_MUX_EXTERNAL);
    CLB_configGPInputMux(CLB1_BASE, CLB_IN2, CLB_GP_IN_MUX_EXTERNAL);

The above code snippet shows the input configuration for EPWM1B. In this example, INPUT X-BAR 1 is used to route the trip signal from GPIO, and CLB X-BAR enables INPUT X-BAR 1 as the source for AUXSIG0, according to the CLB X-BAR Mux Configuration Table in the TRM. Here the trip signal is assigned for both CLB Input 0 and CLB Input 1. That is because the rising edge of the trip signal is needed to determine the rise edge of the expected CLB signal, which will be discussed later, so the input filter selection feature is used to detect the rising edge of the trip signal.

    CLB_selectInputFilter(CLB1_BASE, CLB_IN1, CLB_FILTER_RISING_EDGE);