SLUUCK0A September   2023  – June 2026 ISO5451 , ISO5451-Q1 , ISO5452 , ISO5452-Q1 , ISO5851 , ISO5851-Q1 , ISO5852S , ISO5852S-EP , ISO5852S-Q1 , UCC21710 , UCC21710-Q1 , UCC21732 , UCC21732-Q1 , UCC21736-Q1 , UCC21739-Q1 , UCC21750 , UCC21750-Q1 , UCC21759-Q1

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications
    4. 1.4 General TI High Voltage Evaluation User Safety Guidelines
  6. 2Hardware
    1. 2.1 Module and Gate Driver Compatibility
      1. 2.1.1 Supported Wolfspeed Modules and Evaluation Platforms
      2. 2.1.2 Supported Gate Drivers
    2. 2.2 System Overview and Functions
      1. 2.2.1 PCB Pinout
      2. 2.2.2 Block Diagram
        1. 2.2.2.1 Primary-Side Power
        2. 2.2.2.2 Primary-Side I/O and Diagnostics
        3. 2.2.2.3 Secondary-Side Bias Supply
        4. 2.2.2.4 Output Stage Gate Loop
        5. 2.2.2.5 Current Booster
        6. 2.2.2.6 Short-Circuit Detection System
          1. 2.2.2.6.1 Short-Circuit Detection - DESAT
          2. 2.2.2.6.2 Short-Circuit Detection - OC
        7. 2.2.2.7 Temperature-Sense System
    3. 2.3 Test Setups and Procedures
      1. 2.3.1 Equipment List
      2. 2.3.2 Power-On and Bias Supply Check
      3. 2.3.3 Output Switching
      4. 2.3.4 AIN-APWM Test
  7. 3Implementation Results
    1. 3.1 EVM Example Measurements
      1. 3.1.1 Short-Circuit Testing
        1. 3.1.1.1 OC Variant: Normal Switching vs Short Circuit Soft Turn-Off
        2. 3.1.1.2 DESAT Variant: Normal Switching vs Short Circuit Soft Turn-Off
      2. 3.1.2 Analog Sensing
    2. 3.2 EVM Tuning
      1. 3.2.1 Adjust Power Supplies
        1. 3.2.1.1 Adjust VDD Bias Supply
        2. 3.2.1.2 Adjust VEE Bias Supply
        3. 3.2.1.3 Switch to Unipolar Bias Supply
        4. 3.2.1.4 Bypass VDD LDO
      2. 3.2.2 Adjust Drive Strength
        1. 3.2.2.1 Without Booster
        2. 3.2.2.2 Enabling/Disabling Booster Stage
      3. 3.2.3 Adaptations for Other ISO5x5x / UCC217xx Variants
        1. 3.2.3.1 Adapting EVM for UCC21732/39
        2. 3.2.3.2 Adapting EVM for UCC21737
        3. 3.2.3.3 Adapting EVM for ISO5451/ISO5851
  8. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layouts
    3. 4.3 Bill of Materials (BOM)
  9. 5Additional Information
    1. 5.1 Trademarks
  10. 6Revision History

2.3.4 AIN-APWM Test

To perform this test, make sure tests in Section 2.3.2 are performed and the gate drivers are powered up properly. This test is only valid for devices with the AIN-APWM channel, such as UCC21750.

  1. Disconnect any jumper or thermistor from J4.
  2. Measure the AIN voltage at the TEMP1 via close to pin 1 of the low-side gate driver. This voltage must be around 3.92V if VDD = 15V.
  3. Measure the APWM duty cycle. According to AIN = 3.92V and
    Equation 3. D APWM ⁡ =   - 20 × V A I N + 100
    the duty cycle must be 21.6% with ± 3% accuracy.
UCC217XXQDWEVM-054 Test Point Locations for AIN-APWM Check Figure 2-12 Test Point Locations for AIN-APWM Check