ZHCSH08 October   2017 MSP432E411Y

PRODUCTION DATA.  

  1. 1器件概述
    1. 1.1 特性
    2. 1.2 应用
    3. 1.3 说明
    4. 1.4 功能框图
  2. 2Revision History
  3. 3Device Characteristics
    1. 3.1 Related Products
  4. 4Terminal Configuration and Functions
    1. 4.1 Pin Diagram
    2. 4.2 Pin Attributes
    3. 4.3 Signal Descriptions
      1. Table 4-3 Signal Descriptions
    4. 4.4 GPIO Pin Multiplexing
    5. 4.5 Buffer Type
    6. 4.6 Connections for Unused Pins
  5. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Recommended DC Operating Conditions
    5. 5.5  Recommended GPIO Operating Characteristics
    6. 5.6  Recommended Fast GPIO Pad Operating Conditions
    7. 5.7  Recommended Slow GPIO Pad Operating Conditions
    8. 5.8  GPIO Current Restrictions
    9. 5.9  I/O Reliability
    10. 5.10 Current Consumption
    11. 5.11 Peripheral Current Consumption
    12. 5.12 LDO Regulator Characteristics
    13. 5.13 Power Dissipation
    14. 5.14 Thermal Resistance Characteristics, 212-Pin ZAD (NFBGA) Package
    15. 5.15 Timing and Switching Characteristics
      1. 5.15.1  Load Conditions
      2. 5.15.2  Power Supply Sequencing
        1. 5.15.2.1 Power and Brownout
          1. Table 5-3 Power and Brownout Levels
          2. 5.15.2.1.1 VDDA Levels
          3. 5.15.2.1.2 VDD Levels
          4. 5.15.2.1.3 VDDC Levels
          5. 5.15.2.1.4 VDD Glitch Response
          6. 5.15.2.1.5 VDD Droop Response
      3. 5.15.3  Reset Timing
        1. Table 5-4 Reset Characteristics
      4. 5.15.4  Clock Specifications
        1. 5.15.4.1 PLL Specifications
          1. Table 5-5 Phase Locked Loop (PLL) Characteristics
          2. 5.15.4.1.1 PLL Configuration
        2. 5.15.4.2 PIOSC Specifications
        3. 5.15.4.3 Low-Frequency Oscillator Specifications
          1. Table 5-9 Low-Frequency Oscillator Characteristics
        4. 5.15.4.4 Hibernation Low-Frequency Oscillator Specifications
          1. Table 5-10 Hibernation External Oscillator (XOSC) Input Characteristics
          2. Table 5-11 Hibernation Internal Low-Frequency Oscillator Clock Characteristics
        5. 5.15.4.5 Main Oscillator Specifications
          1. Table 5-12 Main Oscillator Input Characteristics
        6. 5.15.4.6 Main Oscillator Specification WIth ADC
          1. Table 5-14 System Clock Characteristics With ADC Operation
        7. 5.15.4.7 System Clock Characteristics With USB Operation
          1. Table 5-15 System Clock Characteristics With USB Operation
      5. 5.15.5  Sleep Modes
        1. Table 5-16 Wake From Sleep Characteristics
        2. Table 5-17 Wake From Deep Sleep Characteristics
      6. 5.15.6  Hibernation Module
        1. Table 5-18 Hibernation Module Battery Characteristics
        2. Table 5-19 Hibernation Module Characteristics
        3. Table 5-20 Hibernation Module Tamper I/O Characteristics
      7. 5.15.7  Flash Memory
        1. Table 5-21 Flash Memory Characteristics
      8. 5.15.8  EEPROM
        1. Table 5-22 EEPROM Characteristics
      9. 5.15.9  Input/Output Pin Characteristics
        1. Table 5-23 Fast GPIO Module Characteristics
        2. Table 5-24 Slow GPIO Module Characteristics
        3. 5.15.9.1    Types of I/O Pins and ESD Protection
          1. 5.15.9.1.1 Hibernate WAKE pin
            1. Table 5-25 Pad Voltage and Current Characteristics for Hibernate WAKE Pin
          2. 5.15.9.1.2 Nonpower I/O Pins
            1. Table 5-26 Nonpower I/O Pad Voltage and Current Characteristics
      10. 5.15.10 External Peripheral Interface (EPI)
        1. Table 5-28 EPI SDRAM Characteristics
        2. Table 5-29 EPI SDRAM Interface Characteristics
        3. Table 5-30 EPI Host-Bus 8 and Host-Bus 16 Interface Characteristics
        4. Table 5-31 EPI General-Purpose Interface Characteristics
        5. Table 5-32 EPI PSRAM Interface Characteristics
      11. 5.15.11 Analog-to-Digital Converter (ADC)
        1. Table 5-33 Electrical Characteristics for ADC at 1 Msps
        2. Table 5-34 Electrical Characteristics for ADC at 2 Msps
      12. 5.15.12 Synchronous Serial Interface (SSI)
        1. Table 5-35 SSI Characteristics
        2. Table 5-36 Bi- and Quad-SSI Characteristics
      13. 5.15.13 Inter-Integrated Circuit (I2C) Interface
        1. Table 5-37 I2C Characteristics
      14. 5.15.14 Ethernet Controller
        1. 5.15.14.1 DC Characteristics
          1. Table 5-38 Ethernet PHY DC Characteristics
        2. 5.15.14.2 Clock Characteristics for Ethernet
          1. Table 5-39 MOSC 25-MHz Crystal Specification
          2. Table 5-40 MOSC Single-Ended 25-MHz Oscillator Specification
          3. Table 5-41 EN0RREF_CLK 50-MHz Oscillator Specification
        3. 5.15.14.3 AC Characteristics
          1. Table 5-42 Ethernet Controller Enable and Software Reset Timing
          2. Table 5-43 MII Serial Management Timing
          3. Table 5-44 100-Mbps MII Transmit Timing
          4. Table 5-45 100-Mbps MII Receive Timing
          5. Table 5-46 100Base-TX Transmit Timing
          6. Table 5-47 10-Mbps MII Transmit Timing
          7. Table 5-48 10-Mbps MII Receive Timing
          8. Table 5-49 10Base-T Normal Link Pulse Timing
          9. Table 5-50 Auto-Negotiation Fast Link Pulse (FLP) Timing
          10. Table 5-51 100Base-TX Signal Detect Timing
          11. Table 5-52 RMII Transmit Timing
          12. Table 5-53 RMII Receive Timing
      15. 5.15.15 Universal Serial Bus (USB) Controller
        1. Table 5-54 ULPI Interface Timing
      16. 5.15.16 LCD Controller
        1. Table 5-55 LCD Controller Load Capacitance Limits
        2. 5.15.16.1   LCD Interface Display Driver (LIDD Mode)
          1. Table 5-56 LCD Switching Characteristics
          2. Table 5-57 Timing Requirements for LCDDATA in LIDD Mode
          3. 5.15.16.1.1 Hitachi Mode
          4. 5.15.16.1.2 Motorola 6800 Mode
          5. 5.15.16.1.3 Intel 8080 Mode
        3. 5.15.16.2   LCD Raster Mode
          1. Table 5-58 Switching Characteristics for LCD Raster Mode
      17. 5.15.17 Analog Comparator
        1. Table 5-59 Analog Comparator Characteristics
        2. Table 5-60 Analog Comparator Characteristics
        3. Table 5-61 Analog Comparator Voltage Reference Characteristics
        4. Table 5-62 Analog Comparator Voltage Reference Characteristics
      18. 5.15.18 Pulse-Width Modulator (PWM)
        1. Table 5-63 PWM Timing Characteristics
      19. 5.15.19 Emulation and Debug
        1. Table 5-64 JTAG Characteristics
  6. 6Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Arm Cortex-M4F Processor Core
      1. 6.3.1 Processor Core
      2. 6.3.2 System Timer (SysTick)
      3. 6.3.3 Nested Vectored Interrupt Controller (NVIC)
      4. 6.3.4 System Control Block (SCB)
      5. 6.3.5 Memory Protection Unit (MPU)
      6. 6.3.6 Floating-Point Unit (FPU)
    4. 6.4 On-Chip Memory
      1. 6.4.1 SRAM
      2. 6.4.2 Flash Memory
      3. 6.4.3 ROM
      4. 6.4.4 EEPROM
      5. 6.4.5 Memory Map
    5. 6.5 Peripherals
      1. 6.5.1  External Peripheral Interface (EPI)
      2. 6.5.2  Cyclical Redundancy Check (CRC)
      3. 6.5.3  Advanced Encryption Standard (AES) Accelerator
      4. 6.5.4  Data Encryption Standard (DES) Accelerator
      5. 6.5.5  Secure Hash Algorithm/Message Digest Algorithm (SHA/MD5) Accelerator
      6. 6.5.6  Serial Communications Peripherals
        1. 6.5.6.1 Ethernet MAC and PHY
        2. 6.5.6.2 Controller Area Network (CAN)
        3. 6.5.6.3 Universal Serial Bus (USB)
        4. 6.5.6.4 Universal Asynchronous Receiver/Transmitter (UART)
        5. 6.5.6.5 1-Wire Master Module
        6. 6.5.6.6 Inter-Integrated Circuit (I2C)
        7. 6.5.6.7 Quad Synchronous Serial Interface (QSSI)
      7. 6.5.7  System Integration
        1. 6.5.7.1 Direct Memory Access (DMA)
        2. 6.5.7.2 System Control and Clocks
        3. 6.5.7.3 Programmable Timers
        4. 6.5.7.4 Capture Compare PWM (CCP) Pins
        5. 6.5.7.5 Hibernation (HIB) Module
        6. 6.5.7.6 Watchdog Timers
        7. 6.5.7.7 Programmable GPIOs
      8. 6.5.8  LCD Controller
      9. 6.5.9  Advanced Motion Control
        1. 6.5.9.1 Pulse Width Modulation (PWM)
        2. 6.5.9.2 Quadrature Encoder With Index (QEI) Module
      10. 6.5.10 Analog
        1. 6.5.10.1 ADC
        2. 6.5.10.2 Analog Comparators
      11. 6.5.11 JTAG and Arm Serial Wire Debug
      12. 6.5.12 Peripheral Memory Map
    6. 6.6 Identification
    7. 6.7 Boot Modes
  7. 7Applications, Implementation, and Layout
    1. 7.1 System Design Guidelines
  8. 8器件和文档支持
    1. 8.1 入门和后续步骤
    2. 8.2 器件命名规则
    3. 8.3 工具和软件
    4. 8.4 文档支持
    5. 8.5 Community Resources
    6. 8.6 商标
    7. 8.7 静电放电警告
    8. 8.8 出口管制提示
    9. 8.9 术语表
  9. 9机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
  • ZAD|212
散热焊盘机械数据 (封装 | 引脚)
订购信息

4.2 Pin Attributes

Table 4-1 lists GPIO pins with special considerations. Most GPIO pins are configured as GPIOs and are high-impedance by default (GPIOAFSEL = 0, GPIODEN = 0, GPIOPDR = 0, GPIOPUR = 0, and GPIOPCTL = 0). Special consideration pins may be programed to a non-GPIO function or may have special commit controls out of reset. In addition, a POR returns these GPIOs to their original special consideration state.

Table 4-1 GPIO Pins With Special Considerations

GPIO PINSDEFAULT RESET STATEGPIOAFSELGPIODENGPIOPDRGPIOPURGPIOPCTLGPIOCR
PC[3:0] JTAG/SWD 1 1 0 1 0x1 0
PD[7] GPIO(1) 0 0 0 0 0x0 0
PE[7] GPIO(1) 0 0 0 0 0x0 0
(1) This pin is configured as a GPIO by default but is locked and can only be reprogrammed by unlocking the pin in the GPIOLOCK register and uncommitting it by setting the GPIOCR register.

Table 4-2 describes the pin attributes.

Table 4-2 Pin Attributes

PIN NUMBERSIGNAL NAME (1)SIGNAL TYPE (2)BUFFER TYPE (3)PIN MUX ENCODING (4)POWER SOURCE(5)STATE AFTER RESET RELEASE(6)
A1 GND – Power – N/A N/A
A2 GND – Power – N/A N/A
A4 PD4 I/O LVCMOS – VDD OFF
AIN7 I Analog PD4 N/A
SSI1XDAT2 I/O LVCMOS PD4 (15) N/A
T3CCP0 I/O LVCMOS PD4 (3) N/A
U2Rx I LVCMOS PD4 (1) N/A
A5 PE4 I/O LVCMOS – VDD OFF
AIN9 I Analog PE5 N/A
SSI1XDAT0 I/O LVCMOS PE4 (15) N/A
U1RI I LVCMOS PE4 (1) N/A
A7 PE6 I/O LVCMOS – VDD OFF
AIN20 I Analog PE6 N/A
I2C9SCL I/O LVCMOS PE6 (2) N/A
U0CTS I LVCMOS PE6 (1) N/A
A8 PP7 I/O LVCMOS – VDD OFF
AIN22 I Analog PP7 N/A
OWIRE I/O LVCMOS PP7 (5) N/A
A10 PN4 I/O LVCMOS – VDD OFF
EPI0S34 I/O LVCMOS PN4 (15) N/A
I2C2SDA I/O LVCMOS PN4 (3) N/A
U1DTR O LVCMOS PN4 (1) N/A
U3RTS O LVCMOS PN4 (2) N/A
A11 PN2 I/O LVCMOS – VDD OFF
EPI0S29 I/O LVCMOS PN2 (15) N/A
U1DCD I LVCMOS PN2 (1) N/A
U2RTS O LVCMOS PN2 (2) N/A
A13 PQ4 I/O LVCMOS – VDD OFF
DIVSCLK O LVCMOS PQ4 (13) N/A
U1Rx I LVCMOS PQ4 (1) N/A
A14 PS3 I/O LVCMOS – VDD OFF
LCDDATA23 O LVCMOS PS3 (15) N/A
M0FAULT3 I LVCMOS PS3 (6) N/A
T3CCP1 I/O LVCMOS PS3 (3) N/A
A16 PB0 I/O LVCMOS – VDD OFF
CAN1Rx I LVCMOS PB0 (7) N/A
I2C5SCL I/O LVCMOS PB0 (2) N/A
T4CCP0 I/O LVCMOS PB0 (3) N/A
U1Rx I LVCMOS PB0 (1) N/A
USB0ID I Analog PB0 N/A
A17 PB2 I/O LVCMOS – VDD OFF
EN0MDC O LVCMOS PB2 (5) N/A
EPI0S27 I/O LVCMOS PB2 (15) N/A
I2C0SCL I/O LVCMOS PB2 (2) N/A
T5CCP0 I/O LVCMOS PB2 (3) N/A
USB0STP O LVCMOS PB2 (14) N/A
A18 GND – Power Fixed N/A N/A
A19 GND – Power Fixed N/A N/A
B1 GND – Power Fixed N/A N/A
B2 PD7 I/O LVCMOS – VDD OFF
AIN4 I Analog PD7 N/A
NMI I LVCMOS PD7 (8) N/A
SSI2XDAT2 I/O LVCMOS PD7 (15) N/A
T4CCP1 I/O LVCMOS PD7 (3) N/A
U2CTS I LVCMOS PD7 (1) N/A
USB0PFLT I LVCMOS PD7 (5) N/A
B3 PD6 I/O LVCMOS – VDD OFF
AIN5 I Analog PD6 N/A
SSI2XDAT3 I/O LVCMOS PD6 (15) N/A
T4CCP0 I/O LVCMOS PD6 (3) N/A
U2RTS O LVCMOS PD6 (1) N/A
USB0EPEN O LVCMOS PD6 (5) N/A
B4 PD5 I/O LVCMOS – VDD OFF
AIN6 I Analog PD5 N/A
SSI1XDAT3 I/O LVCMOS PD5 (15) N/A
T3CCP1 I/O LVCMOS PD5 (3) N/A
U2Tx O LVCMOS PD5 (1) N/A
B5 PE5 I/O LVCMOS – VDD OFF
AIN8 I Analog PE5 N/A
SSI1XDAT1 I/O LVCMOS PE5 (15) N/A
B6 PB5 I/O LVCMOS – VDD OFF
AIN11 I Analog PB5 N/A
I2C5SDA I/O LVCMOS PB5 (2) N/A
SSI1Clk I/O LVCMOS PB5 (15) N/A
U0RTS O LVCMOS PB5 (1) N/A
B7 PE7 I/O LVCMOS – VDD OFF
AIN21 I Analog PE7 N/A
I2C9SDA I/O LVCMOS PE7 (2) N/A
NMI I LVCMOS PE7 (8) N/A
U0RTS O LVCMOS PE7 (1) N/A
B8 PP6 I/O LVCMOS – VDD OFF
AIN23 I Analog PP6 N/A
I2C2SDA I/O LVCMOS PP6 (2) N/A
U1DCD I LVCMOS PP6 (1) N/A
B9 PN5 I/O LVCMOS – VDD OFF
EPI0S35 I/O LVCMOS PN5 (15) N/A
I2C2SCL I/O LVCMOS PN5 (3) N/A
U1RI I LVCMOS PN5 (1) N/A
U3CTS I LVCMOS PN5 (2) N/A
B10 PN3 I/O LVCMOS – VDD OFF
EPI0S30 I/O LVCMOS PN3 (15) N/A
U1DSR I LVCMOS PN3 (1) N/A
U2CTS I LVCMOS PN3 (2) N/A
B11 PN1 I/O LVCMOS – VDD OFF
U1CTS I LVCMOS PN1 (1) N/A
B12 PP5 I/O LVCMOS – VDD OFF
I2C2SCL I/O LVCMOS PP5 (2) N/A
OWALT I/O LVCMOS PP5 (4) N/A
U3CTS I LVCMOS PP5 (1) N/A
USB0D6 I/O LVCMOS PP5 (14) N/A
B13 PP2 I/O LVCMOS – VDD OFF
EPI0S29 I/O LVCMOS PP2 (15) N/A
U0DTR O LVCMOS PP2 (1) N/A
USB0NXT O LVCMOS PP2 (14) N/A
B14 PS2 I/O LVCMOS – VDD OFF
LCDDATA22 O LVCMOS PS2 (15) N/A
M0FAULT2 I LVCMOS PS2 (6) N/A
T3CCP0 I/O LVCMOS PS2 (3) N/A
U1DSR I LVCMOS PS2 (1) N/A
B15 PC0 I/O LVCMOS – VDD N/A
TCLK/SWCLK I LVCMOS PC0 (1) PU
B16 PB1 I/O LVCMOS – VDD OFF
CAN1Tx O LVCMOS PB1 (7) N/A
I2C5SDA I/O LVCMOS PB1 (2) N/A
T4CCP1 I/O LVCMOS PB1 (3) N/A
U1Tx O LVCMOS PB1 (1) N/A
USB0VBUS I/O Analog PB1 N/A
B17 PB3 I/O LVCMOS – VDD OFF
EN0MDIO I/O LVCMOS PB3 (5) N/A
EPI0S28 I/O LVCMOS PB3 (15) N/A
I2C0SDA I/O LVCMOS PB3 (2) N/A
T5CCP1 I/O LVCMOS PB3 (3) N/A
USB0CLK O LVCMOS PB3 (14) N/A
B18 PL7 I/O LVCMOS – VDD OFF
T1CCP1 I/O LVCMOS PL7 (3) N/A
USB0DM I/O Analog PL7 N/A
B19 GND – Power – N/A N/A
C1 PD1 I/O LVCMOS – VDD OFF
AIN14 I Analog PD1 N/A
C1o O LVCMOS PD1 (5) N/A
I2C7SDA I/O LVCMOS PD1 (2) N/A
SSI2XDAT0 I/O LVCMOS PD1 (15) N/A
T0CCP1 I/O LVCMOS PD1 (3) N/A
C2 PD0 I/O LVCMOS – VDD OFF
AIN15 I Analog PD0 N/A
C0o O LVCMOS PD0 (5) N/A
I2C7SCL I/O LVCMOS PD0 (2) N/A
SSI2XDAT1 I/O LVCMOS PD0 (15) N/A
T0CCP0 I/O LVCMOS PD0 (3) N/A
C5 NC – – – N/A N/A
C6 PB4 I/O LVCMOS – VDD OFF
N/A
AIN10 I Analog PB4 N/A
I2C5SCL I/O LVCMOS PB4 (2) N/A
SSI1Fss I/O LVCMOS PB4 (15) N/A
U0CTS I LVCMOS PB4 (1) N/A
C8 PJ0 I/O LVCMOS – VDD OFF
EN0PPS O LVCMOS PJ0 (5) N/A
U3Rx I LVCMOS PJ0 (1) N/A
C10 PN0 I/O LVCMOS – VDD OFF
U1RTS O LVCMOS PN0 (1) N/A
C12 PP3 I/O LVCMOS – VDD OFF
EPI0S30 I/O LVCMOS PP3 (15) N/A
RTCCLK O LVCMOS PP3 (7) N/A
U0DCD I LVCMOS PP3 (2) N/A
U1CTS I LVCMOS PP3 (1) N/A
USB0DIR O LVCMOS PP3 (14) N/A
C14 PC3 I/O LVCMOS – VDD N/A
TDO/SWO O LVCMOS PC3 (1) PU
C15 PC1 I/O LVCMOS – VDD N/A
TMS/SWDIO I/O LVCMOS PC1 (1) PU
C18 PL6 I/O LVCMOS – VDD OFF
T1CCP0 I/O LVCMOS PL6 (3) N/A
USB0DP I/O Analog PL6 N/A
D1 PD3 I/O LVCMOS – VDD OFF
AIN12 I Analog PD3 N/A
I2C8SDA I/O LVCMOS PD3 (2) N/A
SSI2Clk I/O LVCMOS PD3 (15) N/A
T1CCP1 I/O LVCMOS PD3 (3) N/A
D2 PD2 I/O LVCMOS – VDD OFF
AIN13 I Analog PD2 N/A
C2o O LVCMOS PD2 (5) N/A
I2C8SCL I/O LVCMOS PD0 (2) N/A
SSI2Fss I/O LVCMOS PD2 (15) N/A
T1CCP0 I/O LVCMOS PD2 (3) N/A
D6 PP0 I/O LVCMOS – VDD OFF
C2+ I Analog PP0 N/A
EN0INTRN I LVCMOS PP0 (7) N/A
SSI3XDAT2 I/O LVCMOS PP0 (15) N/A
T6CCP0 I/O LVCMOS PP0 (5) N/A
U6Rx I LVCMOS PP0 (1) N/A
D7 PP1 I/O LVCMOS – VDD OFF
C2- I Analog PP1 N/A
SSI3XDAT3 I/O LVCMOS PP1 (15) N/A
T6CCP1 I/O LVCMOS PP1 (5) N/A
U6Tx O LVCMOS PP1 (1) N/A
D8 PP4 I/O LVCMOS – VDD OFF
OWIRE I/O LVCMOS PP4 (4) N/A
U0DSR I LVCMOS PP4 (2) N/A
U3RTS O LVCMOS PP4 (1) N/A
USB0D7 I/O LVCMOS PP4 (14) N/A
D12 PS0 I/O LVCMOS – VDD OFF
LCDDATA20 O LVCMOS PS0 (15) N/A
M0FAULT0 I LVCMOS PS0 (6) N/A
T2CCP0 I/O LVCMOS PS0 (3) N/A
D13 PS1 I/O LVCMOS – VDD OFF
LCDDATA21 O LVCMOS PS1 (15) N/A
M0FAULT1 I LVCMOS PS1 (6) N/A
T2CCP1 I/O LVCMOS PS1 (3) N/A
D14 PC2 I/O LVCMOS – VDD N/A
TDI I LVCMOS PC2 (1) PU
D18 GNDX2 – Power Fixed N/A N/A
D19 OSC1 O Analog Fixed VDD N/A
E2 PQ1 I/O LVCMOS – VDD OFF
EPI0S21 I/O LVCMOS PQ1 (15) N/A
SSI3Fss I/O LVCMOS PQ1 (14) N/A
T6CCP1 I/O LVCMOS PQ1 (3) N/A
E3 PQ0 I/O LVCMOS – VDD OFF
EPI0S20 I/O LVCMOS PQ0 (15) N/A
SSI3Clk I/O LVCMOS PQ0 (14) N/A
T6CCP0 I/O LVCMOS PQ0 (3) N/A
E7 PJ1 I/O LVCMOS – VDD OFF
U3Tx O LVCMOS PJ1 (1) N/A
E10 VDDC – Power Fixed N/A N/A
E13 NC – – – N/A N/A
E17 PJ5 I/O LVCMOS – VDD OFF
LCDDATA17 O LVCMOS PJ5 (15) N/A
U3CTS I LVCMOS PJ5 (1) N/A
E18 PT2 I/O LVCMOS – VDD OFF
CAN1Rx I LVCMOS PT2 (7) N/A
LCDDATA18 O LVCMOS PT2 (15) N/A
T7CCP0 I/O LVCMOS PT2 (3) N/A
E19 OSC0 I Analog Fixed VDD N/A
F1 PB7 I/O LVCMOS – VDD OFF
I2C6SDA I/O LVCMOS PB7 (1) N/A
T6CCP1 I/O LVCMOS PB7 (3) N/A
F2 PB6 I/O LVCMOS – VDD OFF
I2C6SCL I/O LVCMOS PB6 (1) N/A
T6CCP0 I/O LVCMOS PB6 (3) N/A
F3 VDDA – Power Fixed N/A N/A
F4 VREFA+ – Analog Fixed VDD N/A
F10 GND – Power Fixed N/A N/A
F16 PJ3 I/O LVCMOS – VDD OFF
LCDDATA15 I/O LVCMOS PJ3 (15) N/A
U2CTS I LVCMOS PJ3 (1) N/A
F17 PT3 I/O LVCMOS – VDD OFF
CAN1Tx O LVCMOS PT3 (7) N/A
LCDDATA19 O LVCMOS PT3 (15) N/A
T7CCP1 I/O LVCMOS PT3 (3) N/A
F18 PJ4 I/O LVCMOS – VDD OFF
LCDDATA16 O LVCMOS PJ4 (15) N/A
U3RTS O LVCMOS PJ4 (1) N/A
G1 PE2 I/O LVCMOS – VDD OFF
AIN1 I Analog PE3 N/A
U1DCD I LVCMOS PE1 (1) N/A
G2 PE3 I/O LVCMOS – VDD OFF
AIN0 I Analog PE3 N/A
OWIRE I/O LVCMOS PE3 (5) N/A
U1DTR O LVCMOS PE3 (1) N/A
G4 GNDA – Power Fixed N/A N/A
G5 VREFA- – Analog Fixed VDD N/A
G10 VDD – Power Fixed N/A N/A
G15 PM5 I/O LVCMOS – VDD OFF
T4CCP1 I/O LVCMOS PM5 (3) N/A
TMPR2 I/O LVCMOS PM5 N/A
U0DCD I LVCMOS PM5 (1) N/A
G16 PL0 I/O LVCMOS – VDD OFF
EPI0S16 I/O LVCMOS PL0 (15) N/A
I2C2SDA I/O LVCMOS PL0 (2) N/A
M0FAULT3 I LVCMOS PL0 (6) N/A
USB0D0 I/O LVCMOS PL0 (14) N/A
G18 PL2 I/O LVCMOS – VDD OFF
C0o O LVCMOS PL2 (5) N/A
EPI0S18 I/O LVCMOS PL2 (15) N/A
PhB0 I LVCMOS PL2 (6) N/A
USB0D2 I/O LVCMOS PL2 (14) N/A
G19 PL5 I/O LVCMOS – VDD OFF
EPI0S33 I/O LVCMOS PL5 (15) N/A
T0CCP1 I/O LVCMOS PL5 (3) N/A
USB0D5 I/O LVCMOS PL5 (14) N/A
H2 PE1 I/O LVCMOS – VDD OFF
AIN2 I Analog PE1 N/A
U1DSR I LVCMOS PE1 (1) N/A
H3 PE0 I/O LVCMOS – VDD OFF
AIN3 I Analog PE0 N/A
U1RTS O LVCMOS PE0 (1) N/A
H4 PQ2 I/O LVCMOS – VDD OFF
EPI0S22 I/O LVCMOS PQ2 (15) N/A
SSI3XDAT0 I/O LVCMOS PQ2 (14) N/A
T7CCP0 I/O LVCMOS PQ2 (3) N/A
H9 VDD – Power Fixed N/A N/A
H10 GND – Power Fixed N/A N/A
H11 GND – Power Fixed N/A N/A
H12 GND – Power Fixed N/A N/A
H16 VDDC – Power Fixed N/A N/A
H17 PJ2 I/O LVCMOS – VDD OFF
LCDDATA14 I/O LVCMOS PJ2 (15) N/A
U2RTS O LVCMOS PJ2 (1) N/A
H18 PL4 I/O LVCMOS – VDD OFF
EPI0S26 I/O LVCMOS PL4 (15) N/A
T0CCP0 I/O LVCMOS PL4 (3) N/A
USB0D4 I/O LVCMOS PL4 (14) N/A
H19 PL1 I/O LVCMOS – VDD OFF
EPI0S17 I/O LVCMOS PL1 (15) N/A
I2C2SCL I/O LVCMOS PL1 (2) N/A
PhA0 I LVCMOS PL1 (6) N/A
USB0D1 I/O LVCMOS PL1 (14) N/A
J1 PK0 I/O LVCMOS – VDD OFF
AIN16 I Analog PK0 N/A
EPI0S0 I/O LVCMOS PK0 (15) N/A
U4Rx I LVCMOS PK0 (1) N/A
J2 PK1 I/O LVCMOS – VDD OFF
AIN17 I Analog PK1 N/A
EPI0S1 I/O LVCMOS PK1 (15) N/A
U4Tx O LVCMOS PK1 (1) N/A
J8 VDD – Power Fixed N/A N/A
J9 VDD – Power Fixed N/A N/A
J10 VDD – Power Fixed N/A N/A
J11 GND – Power Fixed N/A N/A
J12 GND – Power Fixed N/A N/A
J18 PL3 I/O LVCMOS – VDD OFF
C1o O LVCMOS PL3 (5) N/A
EPI0S19 I/O LVCMOS PL3 (15) N/A
IDX0 I LVCMOS PL3 (6) N/A
USB0D3 I/O LVCMOS PL3 (14) N/A
K1 PK2 I/O LVCMOS – VDD OFF
AIN18 I Analog PK2 N/A
EPI0S2 I/O LVCMOS PK2 (15) N/A
U4RTS O LVCMOS PK2 (1) N/A
K2 PK3 I/O LVCMOS – VDD OFF
AIN19 I Analog PK3 N/A
EPI0S3 I/O LVCMOS PK3 (15) N/A
U4CTS I LVCMOS PK3 (1) N/A
K3 PC7 I/O LVCMOS – VDD OFF
C0- I Analog PC7 N/A
EPI0S4 I/O LVCMOS PC7 (15) N/A
U5Tx O LVCMOS PC7 (1) N/A
K5 PJ7 I/O LVCMOS – VDD OFF
U4CTS I LVCMOS PK3 (1) N/A
K6 GND – Power Fixed N/A N/A
K7 VDD – Power Fixed N/A N/A
K8 VDD – Power Fixed N/A N/A
K9 GND – Power Fixed N/A N/A
K10 GND – Power Fixed N/A N/A
K11 VDD – Power Fixed N/A N/A
K12 VDD – Power Fixed N/A N/A
K13 GND – Power Fixed N/A N/A
K14 GND – Power Fixed N/A N/A
K15 PG5 I/O LVCMOS – VDD OFF
EN0TXD1 O LVCMOS PG5 (14) N/A
I2C3SDA I/O LVCMOS PG5 (2) N/A
OWALT I/O LVCMOS PG5 (5) N/A
SSI2XDAT0 I/O LVCMOS PG5 (15) N/A
U0RTS O LVCMOS PG5 (1) N/A
K17 PG4 I/O LVCMOS – VDD OFF
EN0TXD0 O LVCMOS PG4 (14) N/A
I2C3SCL I/O LVCMOS PG4 (2) N/A
OWIRE I/O LVCMOS PG4 (5) N/A
SSI2XDAT1 I/O LVCMOS PG4 (15) N/A
U0CTS I LVCMOS PG4 (1) N/A
K18 PM0 I/O LVCMOS – VDD OFF
EPI0S15 I/O LVCMOS PM0 (15) N/A
T2CCP0 I/O LVCMOS PM0 (3) N/A
K19 PM1 I/O LVCMOS – VDD OFF
EPI0S14 I/O LVCMOS PM1 (15) N/A
T2CCP1 I/O LVCMOS PM1 (3) N/A
L2 PC6 I/O LVCMOS – VDD OFF
C0+ I Analog PC6 N/A
EPI0S5 I/O LVCMOS PC6 (15) N/A
U5Rx I LVCMOS PC6 (1) N/A
L8 GND – Power Fixed N/A N/A
L9 GND – Power Fixed N/A N/A
L10 VDD – Power Fixed N/A N/A
L11 VDD – Power Fixed N/A N/A
L12 VDD – Power Fixed N/A N/A
L18 PM2 I/O LVCMOS – VDD OFF
EPI0S13 I/O LVCMOS PM2 (15) N/A
T3CCP0 I/O LVCMOS PM2 (3) N/A
L19 PM3 I/O LVCMOS – VDD OFF
EPI0S12 I/O LVCMOS PM3 (15) N/A
T3CCP1 I/O LVCMOS PM3 (3) N/A
M1 PC5 I/O LVCMOS – VDD OFF
C1+ I Analog PC5 N/A
EPI0S6 I/O LVCMOS PC5 (15) N/A
RTCCLK O LVCMOS PC5 (7) N/A
T7CCP1 I/O LVCMOS PC5 (3) N/A
U7Tx O LVCMOS PC5 (1) N/A
M2 PC4 I/O LVCMOS – VDD OFF
C1- I Analog PC4 N/A
EPI0S7 I/O LVCMOS PC4 (15) N/A
T7CCP0 I/O LVCMOS PC4 (3) N/A
U7Rx I LVCMOS PC4 (1) N/A
M3 PQ7 I/O LVCMOS – VDD OFF
U1RI I LVCMOS PQ7 (1) N/A
M4 PQ3 I/O LVCMOS – VDD OFF
EPI0S23 I/O LVCMOS PQ3 (15) N/A
SSI3XDAT1 I/O LVCMOS PQ3 (14) N/A
T7CCP1 I/O LVCMOS PQ3 (3) N/A
M8 GND – Power Fixed N/A N/A
M9 GND – Power Fixed N/A N/A
M10 GND – Power Fixed N/A N/A
M11 VDD – Power Fixed N/A N/A
M12 VDD – Power Fixed N/A N/A
M16 PG3 I/O LVCMOS – VDD OFF
EN0TXEN O LVCMOS PG3 (14) N/A
I2C2SDA I/O LVCMOS PG3 (2) N/A
SSI2XDAT2 I/O LVCMOS PG3 (15) N/A
M17 HIB O LVCMOS Fixed VBAT OFF
M18 PM4 I/O LVCMOS – VDD OFF
EN0RREF_CLK I/O LVCMOS PM4 (14) N/A
T4CCP0 I/O LVCMOS PM4 (3) N/A
TMPR3 I/O LVCMOS PM4 N/A
U0CTS I LVCMOS PM4 (1) N/A
N1 PJ6 I/O LVCMOS – VDD OFF
LCDAC O LVCMOS PJ6 (15) N/A
U4RTS O LVCMOS PJ6 (1) N/A
N2 PR2 I/O LVCMOS – VDD OFF
I2C2SCL I/O LVCMOS PR2 (2) N/A
LCDLP O LVCMOS PR2 (15) N/A
M0PWM2 O LVCMOS PR2 (6) N/A
N4 PR1 I/O LVCMOS – VDD OFF
I2C1SDA I/O LVCMOS PR1 (2) N/A
LCDFP O LVCMOS PR1 (15) N/A
M0PWM1 O LVCMOS PR1 (6) N/A
U4Rx I LVCMOS PR1 (1) N/A
N5 PR0 I/O LVCMOS – VDD OFF
I2C1SCL I/O LVCMOS PR0 (2) N/A
LCDCP O LVCMOS PR0 (15) N/A
M0PWM0 O LVCMOS PR0 (6) N/A
U4Tx O LVCMOS PR0 (1) N/A
N10 GND – Power Fixed N/A N/A
N15 PG0 I/O LVCMOS – VDD OFF
EN0PPS O LVCMOS PG0 (5) N/A
EPI0S11 I/O LVCMOS PG0 (15) N/A
I2C1SCL I/O LVCMOS PG0 (2) N/A
M0PWM4 O LVCMOS PG0 (6) N/A
N16 VDD – Power Fixed N/A N/A
N18 PM7 I/O LVCMOS – VDD OFF
EN0COL I LVCMOS PM6 (14) N/A
T5CCP1 I/O LVCMOS PM7 (3) N/A
TMPR0 I/O LVCMOS PM7 N/A
U0RI I LVCMOS PM7 (1) N/A
N19 PM6 I/O LVCMOS – VDD OFF
EN0CRS I LVCMOS PM6 (14) N/A
T5CCP0 I/O LVCMOS PM6 (3) N/A
TMPR1 I/O LVCMOS PM6 N/A
U0DSR I LVCMOS PM6 (1) N/A
P2 PR5 I/O LVCMOS – VDD OFF
I2C3SDA I/O LVCMOS PR5 (2) N/A
LCDDATA01 I/O LVCMOS PR5 (15) N/A
M0PWM5 O LVCMOS PR5 (6) N/A
T0CCP1 I/O LVCMOS PR5 (3) N/A
U1Rx I LVCMOS PR5 (1) N/A
P3 PR4 I/O LVCMOS – VDD OFF
I2C3SCL I/O LVCMOS PR4 (2) N/A
LCDDATA00 I/O LVCMOS PR4 (15) N/A
M0PWM4 O LVCMOS PR4 (6) N/A
T0CCP0 I/O LVCMOS PR4 (3) N/A
P4 PH0 I/O LVCMOS – VDD OFF
EPI0S0 I/O LVCMOS PH0 (15) N/A
U0RTS O LVCMOS PH0 (1) N/A
P10 VDD – Power Fixed N/A N/A
P16 GND – Power Fixed N/A N/A
P17 VDD – Power Fixed N/A N/A
P18 RST I LVCMOS Fixed VDD OFF
P19 VBAT – Power Fixed N/A N/A
R1 PH2 I/O LVCMOS – VDD OFF
EPI0S2 I/O LVCMOS PH2 (15) N/A
U0DCD I LVCMOS PH2 (1) N/A
R2 PH1 I/O LVCMOS – VDD OFF
EPI0S1 I/O LVCMOS PH1 (15) N/A
U0CTS I LVCMOS PH1 (1) N/A
R3 PH4 I/O LVCMOS – VDD OFF
U0DTR O LVCMOS PH4 (1) N/A
R7 PA7 I/O LVCMOS – VDD OFF
EPI0S9 I/O LVCMOS PA7 (15) N/A
I2C6SDA I/O LVCMOS PA7 (2) N/A
SSI0XDAT3 I/O LVCMOS PA7 (13) N/A
T3CCP1 I/O LVCMOS PA7 (3) N/A
U2Tx O LVCMOS PA7 (1) N/A
USB0EPEN O LVCMOS PA7 (11) N/A
USB0PFLT I LVCMOS PA7 (5) N/A
R10 PR7 I/O LVCMOS – VDD OFF
EN0TXEN O LVCMOS PR7 (14) N/A
I2C4SDA I/O LVCMOS PR7 (2) N/A
LCDDATA05 I/O LVCMOS PR7 (15) N/A
M0PWM7 O LVCMOS PR7 (6) N/A
T1CCP1 I/O LVCMOS PR7 (3) N/A
R13 PS7 I/O LVCMOS – VDD OFF
EN0RXDV I LVCMOS PS7 (14) N/A
LCDDATA09 I/O LVCMOS PS7 (15) N/A
T5CCP1 I/O LVCMOS PS7 (3) N/A
R17 GND – Power Fixed N/A N/A
R18 GNDX – Power Fixed N/A N/A
T1 PH3 I/O LVCMOS – VDD OFF
EPI0S3 I/O LVCMOS PH3 (15) N/A
U0DSR I LVCMOS PH3 (1) N/A
T2 PH5 I/O LVCMOS – VDD OFF
EN0PPS O LVCMOS PH5 (15) N/A
U0RI I LVCMOS PH5 (1) N/A
T6 PA2 I/O LVCMOS – VDD OFF
I2C8SCL I/O LVCMOS PA2 (2) N/A
SSI0Clk I/O LVCMOS PA2 (15) N/A
T1CCP0 I/O LVCMOS PA2 (3) N/A
U4Rx I LVCMOS PA2 (1) N/A
T7 PF3 I/O LVCMOS – VDD OFF
EN0MDIO I/O LVCMOS PF3 (5) N/A
M0PWM3 O LVCMOS PF3 (6) N/A
SSI3Clk I/O LVCMOS PF3 (14) N/A
TRCLK O LVCMOS PF3 (15) N/A
T8 PF6 I/O LVCMOS – VDD OFF
LCDMCLK O LVCMOS PF6 (15) N/A
T12 PN6 I/O LVCMOS – VDD OFF
EN0TXER O LVCMOS PN6 (14) N/A
LCDDATA13 I/O LVCMOS PN6 (15) N/A
U4RTS O LVCMOS PN6 (2) N/A
T13 PS5 I/O LVCMOS – VDD OFF
EN0TXD1 O LVCMOS PS5 (14) N/A
LCDDATA07 I/O LVCMOS PS5 (15) N/A
PhB0 I LVCMOS PS5 (6) N/A
T4CCP1 I/O LVCMOS PS5 (3) N/A
G14 PG1 I/O LVCMOS – VDD OFF
EPI0S10 I/O LVCMOS PG1 (15) N/A
I2C1SDA I/O LVCMOS PG1 (2) N/A
M0PWM5 O LVCMOS PG1 (6) N/A
T18 XOSC0 I Analog Fixed VBAT N/A
T19 XOSC1 O Analog Fixed VBAT N/A
U2 PH6 I/O LVCMOS – VDD OFF
U5Rx I LVCMOS PH6 (1) N/A
U7Rx I LVCMOS PH6 (2) N/A
U5 PA3 I/O LVCMOS – VDD OFF
I2C8SDA I/O LVCMOS PA3 (2) N/A
SSI0Fss I/O LVCMOS PA3 (15) N/A
T1CCP1 I/O LVCMOS PA3 (2) N/A
U4Tx O LVCMOS PA3 (1) N/A
U6 PF0 I/O LVCMOS – VDD OFF
EN0LED0 O LVCMOS PF0 (5) N/A
M0PWM0 O LVCMOS PF0 (6) N/A
SSI3XDAT1 I/O LVCMOS PF0 (14) N/A
TRD2 O LVCMOS PF0 (15) N/A
U8 PF7 I/O LVCMOS – VDD OFF
LCDDATA02 I/O LVCMOS PF7 (15) N/A
U10 PS6 I/O LVCMOS – VDD OFF
EN0RXER I LVCMOS PS6 (14) N/A
IDX0 I LVCMOS PS6 (6) N/A
LCDDATA08 I/O LVCMOS PS6 (15) N/A
T5CCP0 I/O LVCMOS PS6 (3) N/A
U12 PN7 I/O LVCMOS – VDD OFF
LCDDATA12 I/O LVCMOS PN7 (15) N/A
U1RTS O LVCMOS PN7 (1) N/A
U4CTS I LVCMOS PN7 (2) N/A
U14 PG7 I/O LVCMOS – VDD OFF
EN0RXDV I LVCMOS PG7 (14) N/A
I2C4SDA I/O LVCMOS PG7 (2) N/A
OWIRE I/O LVCMOS PG7 (5) N/A
SSI2Clk I/O LVCMOS PG7 (15) N/A
U15 PQ6 I/O LVCMOS – VDD OFF
EN0RXD1 I LVCMOS PQ6 (14) N/A
U1DTR O LVCMOS PQ6 (1) N/A
U18 WAKE I LVCMOS Fixed VBAT OFF
U19 PK4 I/O LVCMOS – VDD OFF
EN0INTRN I LVCMOS PK4 (7) N/A
EN0LED0 O LVCMOS PK4 (5) N/A
EN0RXD3 I LVCMOS PK4 (14) N/A
EPI0S32 I/O LVCMOS PK4 (15) N/A
I2C3SCL I/O LVCMOS PK4 (2) N/A
M0PWM6 O LVCMOS PR6 (6) N/A
V1 GND – Power Fixed N/A N/A
V2 PH7 I/O LVCMOS – VDD OFF
U5Tx O LVCMOS PH7 (1) N/A
U7Tx O LVCMOS PH7 (2) N/A
V3 PA0 I/O LVCMOS – VDD OFF
CAN0Rx I LVCMOS PA0 (7) N/A
I2C9SCL I/O LVCMOS PA0 (2) N/A
T0CCP0 I/O LVCMOS PA0 (3) N/A
U0Rx I LVCMOS PA0 (1) N/A
V4 PA4 I/O LVCMOS – VDD OFF
I2C7SCL I/O LVCMOS PA4 (2) N/A
SSI0XDAT0 I/O LVCMOS PA4 (15) N/A
T2CCP0 I/O LVCMOS PA4 (3) N/A
U3Rx I LVCMOS PA4 (1) N/A
V5 PA6 I/O LVCMOS – VDD OFF
EN0RXCK I LVCMOS PA6 (14) N/A
EPI0S8 I/O LVCMOS PA6 (15) N/A
I2C6SCL I/O LVCMOS PA6 (2) N/A
SSI0XDAT2 I/O LVCMOS PA6 (13) N/A
T3CCP0 I/O LVCMOS PA6 (3) N/A
U2Rx I LVCMOS PA6 (1) N/A
USB0EPEN O LVCMOS PA6 (5) N/A
V6 PF1 I/O LVCMOS – VDD OFF
EN0LED2 O LVCMOS PF1 (5) N/A
M0PWM1 O LVCMOS PF1 (6) N/A
SSI3XDAT0 I/O LVCMOS PF1 (14) N/A
TRD1 O LVCMOS PF1 (15) N/A
V7 PF4 I/O LVCMOS – VDD OFF
EN0LED1 O LVCMOS PF4 (5) N/A
M0FAULT0 I LVCMOS PF4 (6) N/A
SSI3XDAT2 I/O LVCMOS PF4 (14) N/A
TRD3 O LVCMOS PF4 (15) N/A
V8 PR3 I/O LVCMOS – VDD OFF
I2C2SDA I/O LVCMOS PR3 (2) N/A
LCDDATA03 I/O LVCMOS PR3 (15) N/A
M0PWM3 O LVCMOS PR3 (6) N/A
V9 PS4 I/O LVCMOS – VDD OFF
EN0TXD0 O LVCMOS PS4 (14) N/A
LCDDATA06 I/O LVCMOS PS4 (15) N/A
PhA0 I LVCMOS PS4 (6) N/A
T4CCP0 I/O LVCMOS PS4 (3) N/A
V10 PT1 I/O LVCMOS – VDD OFF
CAN0Tx O LVCMOS PT1 (7) N/A
EN0RXD1 I LVCMOS PT1 (14) N/A
LCDDATA11 I/O LVCMOS PT1 (15) N/A
T6CCP1 I/O LVCMOS PT1 (3) N/A
V11 PG2 I/O LVCMOS – VDD OFF
EN0TXCK I LVCMOS PG2 (14) N/A
I2C2SCL I/O LVCMOS PG2 (2) N/A
SSI2XDAT3 I/O LVCMOS PG2 (15) N/A
V12 PG6 I/O LVCMOS – VDD OFF
EN0RXER I LVCMOS PG6 (14) N/A
I2C4SCL I/O LVCMOS PG6 (2) N/A
OWIRE I/O LVCMOS PG6 (5) N/A
SSI2Fss I/O LVCMOS PG6 (15) N/A
V13 EN0RXIN I/O LVCMOS Fixed VDD OFF
V14 EN0TXON I/O LVCMOS Fixed VDD OFF
V15 EN0TXOP I/O LVCMOS Fixed VDD OFF
V16 PK6 I/O LVCMOS – VDD OFF
EN0LED1 O LVCMOS PK6 (5) N/A
EN0TXD2 O LVCMOS PK6 (14) N/A
EPI0S25 I/O LVCMOS PK6 (15) N/A
I2C4SCL I/O LVCMOS PK6 (2) N/A
M0FAULT1 I LVCMOS PK6 (6) N/A
V17 PK5 I/O LVCMOS – VDD OFF
EN0LED2 O LVCMOS PK5 (5) N/A
EN0RXD2 I LVCMOS PK5 (14) N/A
EPI0S31 I/O LVCMOS PK5 (15) N/A
I2C3SDA I/O LVCMOS PK5 (2) N/A
M0PWM7 O LVCMOS PK5 (6) N/A
V18 NC – – – N/A N/A
V19 NC – – – N/A N/A
W1 GND – Power Fixed N/A N/A
W2 GND – Power Fixed N/A N/A
W3 PA1 I/O LVCMOS – VDD OFF
CAN0Tx O LVCMOS PA1 (7) N/A
I2C9SDA I/O LVCMOS PA1 (2) N/A
T0CCP1 I/O LVCMOS PA1 (3) N/A
U0Tx O LVCMOS PA1 (1) N/A
W4 PA5 I/O LVCMOS – VDD OFF
I2C7SDA I/O LVCMOS PA5 (2) N/A
SSI0XDAT1 I/O LVCMOS PA5 (15) N/A
T2CCP1 I/O LVCMOS PA5 (3) N/A
U3Tx O LVCMOS PA5 (1) N/A
W6 PF2 I/O LVCMOS – VDD OFF
EN0MDC O LVCMOS PF2 (5) N/A
M0PWM2 O LVCMOS PF2 (6) N/A
SSI3Fss I/O LVCMOS PF2 (14) N/A
TRD0 O LVCMOS PF2 (15) N/A
W7 PF5 I/O LVCMOS – VDD OFF
SSI3XDAT3 I/O LVCMOS PF5 (14) N/A
W9 PR6 I/O LVCMOS – VDD OFF
I2C4SCL I/O LVCMOS PR6 (2) N/A
LCDDATA04 I/O LVCMOS PR6 (15) N/A
M0PWM6 O LVCMOS PR6 (6) N/A
T1CCP0 I/O LVCMOS PR6 (3) N/A
U1Tx O LVCMOS PR6 (1) N/A
W10 PT0 I/O LVCMOS – VDD OFF
CAN0Rx I LVCMOS PT0 (7) N/A
EN0RXD0 I LVCMOS PT0 (14) N/A
LCDDATA10 I/O LVCMOS PT0 (15) N/A
T6CCP0 I/O LVCMOS PT0 (3) N/A
W12 PQ5 I/O LVCMOS – VDD OFF
EN0RXD0 I LVCMOS PQ5 (14) N/A
U1Tx O LVCMOS PQ5 (1) N/A
W13 EN0RXIP I/O LVCMOS Fixed VDD N/A
W15 RBIAS O Analog Fixed VDD N/A
W16 PK7 I/O LVCMOS – VDD OFF
EN0TXD3 O LVCMOS PK7 (14) N/A
EPI0S24 I/O LVCMOS PK7 (15) N/A
I2C4SDA I/O LVCMOS PK7 (2) N/A
M0FAULT2 I LVCMOS PK7 (6) N/A
RTCCLK O LVCMOS PK7 (5) N/A
U0RI I LVCMOS PK7 (1) N/A
W18 NC – – – N/A N/A
W19 NC – – – N/A N/A
(1) Signals names with (PN) denote the default pin name.
(2) Signal Types: I = Input, O = Output, I/O = Input or Output.
(3) For details on buffer types, see Table 4-5.
(4) Pin mux encodings with (RD) denote the default encoding after reset release.
(5) N/A = Not applicable
(6) State after reset release: PU = High impedance with an active pullup resistor, OFF = High impedance, N/A = not applicable