ZHCSS30E february 2006 – october 2020 SN65LVDS301
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP(1) | MAX | UNIT | |
---|---|---|---|---|---|---|
subLVDS output (D0+, D0–, D1+, D1–, D2+, D1–, CLK+, and CLK–) | ||||||
VOCM(SS) | Steady-state common-mode output voltage | Output load see Figure 7-3 | 0.8 | 0.9 | 1.0 | V |
VOCM(SS) | Change in steady-state common-mode output voltage | –10 | 10 | mV | ||
VOCM(PP) | Peak-to-peak common mode output voltage | 75 | mV | |||
|VOD| | Differential output voltage magnitude |VDx+ – VDx– |, |VCLK+ – VCLK– | | 100 | 150 | 200 | mV | |
Δ|VOD| | Change in differential output voltage between logic states | –10 | 10 | mV | ||
ZOD(CLK) | Differential small-signal output impedance | TXEN at VDD | 210 | Ω | ||
IOSD | Differential short-circuit output current | VOD = 0 V, fPCLK = 28 MHz | 10 | mA | ||
IOS | Short circuit output current(2) | VO = 0 V or VDD | 5 | |||
IOZ | High-impedance state output current | VO = 0 V or VDD(max), TXEN at GND | –3 | 3 | μA |