ZHCSJM7 April 2019 BQ79606A-Q1
PRODUCTION DATA.
Register addresses are two bytes in length. Any write command done to an invalid register address is ignored. Any read from an invalid register returns a 0x00 response. This is true for command frames sent to an individual register with invalid address, or as part of command sent to multiple registers with invalid addresses. When read/write addresses a block of registers with only some invalid addresses, the valid addresses respond as normal, while the invalid addresses respond as previously described.
| Bit | Name | Description |
|---|---|---|
| 7 | Register Address(MSB) | 0b00000000 - 0b11111111: Targeted Register Address (MSB) |
| 6 | ||
| 5 | ||
| 4 | ||
| 3 | ||
| 2 | ||
| 1 | ||
| 0 | ||
| 7 | Register Address(LSB) | 0b00000000 - 0b11111111: Targeted Register Address (LSB) |
| 6 | ||
| 5 | ||
| 4 | ||
| 3 | ||
| 2 | ||
| 1 | ||
| 0 |