ZHCSJM7 April 2019 BQ79606A-Q1
PRODUCTION DATA.
COMM_COML_FLT_MSK Register Address: 0x10 | |||||||
B7 | B6 | B5 | B4 | B3 | B2 | B1 | B0 |
SPARE[1] | SPARE[0] | BERR_MSK | DATA_MISS_MSK | DATA_ORDER_MSK | SYNC2_MSK | SYNC1_MSK | BIT_MSK |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
RW | RW | RW | RW | RW | RW | RW | RW |
SPARE[1:0] | Spare | ||||||
BERR_MSK | Enables mask for COMM_COML_FAULT[BERR]
0: Mask disabled 1: Mask enabled to prevent fault signaling |
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DATA_MISS_MSK | Enables mask for COMM_COML_FAULT[DATA_MISS]
0: Mask disabled 1: Mask enabled to prevent fault signaling |
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DATA_ORDER_MSK | Enables mask for COMM_COML_FAULT[DATA_ORDER]
0: Mask disabled 1: Mask enabled to prevent fault signaling |
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SYNC2_MSK | Enables mask for COMM_COML_FAULT[SYNC2]
0: Mask disabled 1: Mask enabled to prevent fault signaling |
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SYNC1_MSK | Enables mask for COMM_COML_FAULT[SYNC1]
0: Mask disabled 1: Mask enabled to prevent fault signaling |
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BIT_MSK | Enables mask for COMM_COML_FAULT[BIT]
0: Mask disabled 1: Mask enabled to prevent fault signaling |