ZHCSJM7 April 2019 BQ79606A-Q1
PRODUCTION DATA.
The differential stack interface uses an asynchronous 12-bit byte-transfer protocol that operates at baudDC. Data is transferred LSB first and every bit is duplicated (with a complement) to ensure the transmission has no DC content. The receiver samples the signal 8 times per half bit time. A zero is transmitted as one half-bit period low followed by one half-bit period high, while transmission of a one is a half-bit period high followed by a half-bit period low. See Figure 28A for a graphical representation of the bit definitions. Two synchronization bits are used to extract timing information. If the timing information extracted from the demodulation of the preamble half-bit and the two full bits of synchronization is outside of the expected window, the COMM_COM*_FAULT[SYNC2] bit is set and the byte is not processed. If the demodulation of the preamble half-bit and the two full bits of synchronization data have errors and the timing is likely not correct, the COMM_COM*_FAULT[SYNC1] bit is set and the byte is not processed.
A byte contains two SYNC bits, a start-of-frame bit, eight data bits starting from the LSB "D0" to MSB "D7" (D0 is transmitted just after State-Of-Frame and D7 comes last before the Byte Error and Postamble) , and byte error bit as shown in the figure below. Additionally, a preamble and postamble are always used to ensure DC balance for transformer applications. The SYNC bits are always two zeros. See Figure 28B for a graphical representation of the protocol. Once two valid SYNC bits are received, the additional bits are decoded and sent to the command processor. If, during the demodulation of the bus traffic, a bit is decoded that is not a "strong" '1' or '0' (meaning there were not sufficient samples to indicate the logic level with certainty), the COMM_COM*_FAULT[BIT] bit is set and the byte is not decoded. If, during the demodulation of the bus traffic, one or more of the received data bits does not have the expected complement bit structure, the COMM_COM*_FAULT[DATA_ORDER] bit is set and the byte is not decoded. If, during the communication, there is a failure to detect a valid '1' or '0' on the bus when one is expected (every bit time), the COMM_COM*_FAULT[DATA_MISS] bit is set and the byte is not decoded.
Each byte is transmitted at 2MHz (250ns per pulse or 500ns per couplet). The throughput is determined by the baud rate set by the COMM_CTRL[BAUD] bits. The time between each byte depends on this setting, but the byte time is always the same. See Figure 29.
The daisy chain retransmits the data on a bit level to improve daisy-chain robustness. If an error is detected in the received data (any error indicated in the COMM_COM*_FAULT register), the data is still forwarded, but the byte error bit is set to indicate to the devices up the stack that the data is likely corrupted and must be ignored. The COMM_COM*_FAULT[BERR] bit is set and the byte is ignored whenever a byte is received with the byte error set. The ignored byte likely also causes other errors as well depending on where in the frame it occurs.
The start-of-frame bit defines the byte as the first in the frame (the frame initialization byte). The first frame bit is analogous to receiving a communication clear (break) from the UART interface. Receiving a frame start bit in the middle of a frame causes the frame to be discarded, and a new frame started. The unexpected SOF flag (COMM_COM*_*_FAULT[SOF]) is set. For situations where sync in the datastream is lost, the start frame bit enables re-syncing the datastream. The frame start bit is set whenever a communication clear is signaled on the UART interface (also it is set based on the framing event .
Data is forwarded up/down the stack and to the host (from the base device) even if the byte is tagged with a byte error. Each device recognizes the byte error and sets the appropriate BERR bit (register depends on the interface and what kind of frame is received) and then signals a fault (if unmasked). The host must rely on CRC errors and the BERR fault to determine that a byte error has occurred and take the appropriate action.