ZHCSJM7 April 2019 BQ79606A-Q1
PRODUCTION DATA.
COMM_COML_RR_FAULT Register Address: 0x2A0 | |||||||
B7 | B6 | B5 | B4 | B3 | B2 | B1 | B0 |
RSVD[1] | RSVD[0] | RSVD | TXDIS | SOF | BERR | UNEXP | CRC |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
R | R | R | R | R | R | R | R |
RSVD[1:0] | Reserved | ||||||
RSVD | Reserved | ||||||
TXDIS | Given the transmit direction is set to reverse direction with CONTROL[DIR_SEL]=1. This bit indicates a RR discard due to COMH TX being disabled (stack device) or UART TX being disabled (base device).
0: No fault 1: Fault |
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SOF | Indicates a start of frame error on COML (frame start bit of '1' is received before the current frame is finished)
0: No fault 1: Fault |
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BERR | Will be set any time COML vertical interface block has detected a physical layer fault on the second or later byte of a frame. This error can be caused one or more of faults as seen in physical layer at vertical interface register “COMM_COML_FAULT”. This is also can be set when a received data is interrupted by a transmit transit byte (came from UART to VIF, valid only on the base device).
0: No fault 1: Fault |
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UNEXP | This bit is set if a response is received by COML when CONTROL1[DIR_SEL]=0.
0: No fault 1: Fault |
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CRC | Indicates a CRC error that resulted in one or more COML response frames being discarded. Most other errors in the frame are not indicated as the frame was discarded. If BERR is observed on the final byte of the CRC, both CRC and BERR will indicated.
0: No fault 1: Fault |