SPRACR2 March   2020 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1

 

  1.   Enabling Peripheral Expansion Applications Using the HIC
    1.     Trademarks
    2. 1 Introduction
    3. 2 HIC Configurations Overview
      1. 2.1 Access Modes
      2. 2.2 Data Width Selection
      3. 2.3 Base Address Selection
      4. 2.4 Read/write I/O Configuration
      5. 2.5 Device to Host Interrupts
        1. 2.5.1 Device Internal Events
        2. 2.5.2 Software Interrupts
    4. 3 Hardware Considerations
      1. 3.1 Common Signal Names
      2. 3.2 Address Pin Mapping
      3. 3.3 BASESEL Pin Mapping
    5. 4 Example Configuration for Pin Constrained Applications
      1. 4.1 Test Setup
      2. 4.2 Test Description
    6. 5 Example Configuration for Performance-Critical Applications
      1. 5.1 Test Setup
      2. 5.2 Test Description
    7. 6 Handling Device Reset and Low-Power Conditions
    8. 7 References
  2.   A Address Translation for Different Data Width Modes
    1.     A.1 Base Address and Offset Address Configuration

BASESEL Pin Mapping

As discussed in the Section 2.1, the Mailbox access mode is restricted to the HIC registers. In the Direct access mode, the Host can access both the HIC registers and the Device peripheral registers. These accesses are differentiated by the HIC_BASESEL0 pin. If an access is initiated with the HIC_BASESEL0 set to 0, it will be treated as Mailbox access operation, and if the pin is set to 1, the access will be treated as a Direct access operation.

For Direct access mode, the higher unused address pins of the Host memory controller can be connected to the HIC_BASESEL[2:0] pins and the corresponding addresses in the Host memory map can be used as the Device access offset. The Table 5 shows the BASESEL pin mapping for different access types for 16-bit data width.

Table 5. BASESEL Pin Mapping With C2000 EMIF Host

Device Signal Host EMIF Signal
Mailbox Access Direct Access
HOSTCR.PAGESEL=0 HOSTCR.PAGESEL=1
HIC_BASESEL0 X (1) EMxA7 EMxA7
HIC_BASESEL1 X (1) X (1) EMxA8
HIC_BASESEL2 X (1) X (1) EMxA9
  1. X = IO pins are not to be selected for HIC function.