Dual-Axis Motor Control Using FCL and SFRA On a Single C2000 MCU

Dual-Axis Motor Control Using FCL and SFRA On a Single C2000™ MCU

Trademarks

C2000 is a registered trademark of Texas Instruments.

1 Introduction

High performance motor drives in servo control and robotics applications are expected to provide high precision and high bandwidth control of current, speed and position loops for superior control of end applications such as robotic arm, CNC machines, and so forth. Since the current loop makes up the inner most control loop, it must have a high bandwidth to enable the outer speed or position loops to be faster. Hence, a high bandwidth FCL is needed in high performance industrial servo control applications. However, the delays due to ADC conversion and algorithm execution limit the current controller bandwidth to about a tenth of the sampling frequency.

Until recently, because of the time critical computational demand of the control algorithm and interface demands of various position encoders, FPGAs and external ADCs were needed to implement the fast current loop. However, with the advent of latest C2000 Delfino and Piccolo family of microcontrollers, it is now possible to replace FPGAs and external ADCs with these MCUs for a cost effective solution. This paper outlines the implementation of fast current loop on a C2000 platform running two motors, and verifies the frequency response of the control loops using TI’s Software Frequency Response Analyzer (SFRA) software library. Dynamic frequency response analysis in real-time on a motor drive system is unique among MCU suppliers and is currently capable only on C2000 MCUs.

Using the released FCL algorithm for this device and the Software Frequency Response Analyzer (SFRA) library for C2000 MCUs from TI, the control bandwidth of fast current loop and the operating speed range of motor are experimentally verified. This design guide documents the test platform setup, procedure and the quantitative results obtained. It is important to note that when the PWM carrier frequency is 10 KHz, the current loop bandwidth obtained is 5 KHz for a phase margin of 45° over a wide speed range. Compared to the traditional MCU based systems, FCL software can potentially triple a drive system’s torque response and double its maximum speed without increasing the PWM carrier frequency.

The Delfino F2837x and Piccolo F28004x series of C2000 microcontroller enable a new value point for dual-axis drives that also delivers very robust motion-control performance. The value comes not only from the achievable control performance and ability to drive two motors concurrently, but also from the high degree of on-chip integration of other key electronic system functions. Since both F2837x and F28004x devices support CPU and CLA cores, CPU offload encoder-feedback and torque control processing to the control law accelerator (CLA) to maximize the performance of dual-axis servo drive.

1.1 Acronyms and Descriptions

2 Benefits of the C2000 for High-Bandwidth Current Loop

The C2000 family of MCUs possesses the desired computation power to execute complex control algorithms along with the correct combination of peripherals such as ADC, enhanced pulse width modulator (ePWM), enhanced quadrature encoder pulse (eQEP) and enhanced capture (eCAP) to interface with various components of the digital motor control (DMC) hardware. These peripherals have necessary hooks to provide flexible PWM protection, such as trip zones for PWMs and comparators.

Both F2837x and F28004x MCUs contain additional hardware features such as the following:

• Higher CPU and control law accelerator (CLA) clock frequency
• Parallel processing floating point core (CLA) augmenting the main CPU
• Trigonometric Math Unit (TMU) to support high speed, precision trigonometric and math functions
• Four high speed precision 12bit and 16bit ADCs on F2837x, or three high speed precision 12-bit ADCs on F28004x.
• Configurable Logic Blocks (CLB) - using PM library from TI, a range of absolute encoders can be interfaced

Together, these features provide enough hardware support to increase computational bandwidth per CPU core compared to its predecessors and offer superior real-time control performance. In addition, the C2000 ecosystem of software (libraries and application software) and hardware (LAUNCHXL-F28379D, LAUNCHXL-F280049C, BOOSTXL-3PhGaNInv) help to reduce the time and effort needed to develop a high-end digital motor control solution.

3 Current Loops in Servo Drives

Figure 1 shows the basic speed control block diagram of a field oriented control (FOC) based AC motor control system used in servo drives. The current loop is highlighted here because this is the inner most loop and has a higher influence on the bandwidth of the outer speed and position loops. For the outer loop to have a higher bandwidth, the inner loop must have a far higher bandwidth, typically more than three times.

In the current loop, any two of the motor phase currents are measured, while the third can be estimated from these two sensing currents. These measurements feed the Clarke transformation module. The outputs of this projection are designated I_α and I_β. These two components of the current along with the rotor flux position are the inputs of the Park transformation, which transform them to currents (I_d and I_q ) in D-Q rotating reference frame. The I_d and I_q components are compared to the references I_dref (the flux reference) and I_qref (the torque reference). At this point, the control structure shows an interesting advantage; it can be used to control either synchronous (PM) or asynchronous (ACIM) machines by simply changing the flux reference and obtaining the rotor flux position. In the synchronous permanent magnet motor, the rotor flux is fixed as determined by the magnets, so there is no need to create it. Therefore, when controlling a PMSM motor, I_dref can be set to zero, except during field weakening. Unlike PM motor, ACIM motors do not have a rotor flux by default. Since the flux need to be created, the flux reference current must be greater than zero.

The torque command I_qref can be fed from the output of the speed regulator. The outputs of the current regulators are V_dref and V_qref. These outputs are applied to the inverse Park transformation. Using the position of rotor flux, this projection generates V_αref and V_βref, which are the components of the stator vector voltage in the stationary orthogonal reference frame. These components are the inputs of the PWM generation block. The outputs of this block are the signals that drive the inverter.

Both Park and inverse Park transformations need the rotor flux position. Obtaining this rotor flux position depends on the choice of AC machine observer in sensorless control or the position encoder in the case sensored control.

4 PWM Update Latency for Dual Motor

The major challenge in implementing the current loop lies in reducing the latency between feedback sampling and PWM updates. In traditional control schemes, this latency is typically one sampling period, thereby, delaying the control action. In other words, it leads to one sampling period of inaction to any disturbances in the loop. For a fast current loop, this delay must be as small as possible to improve the loop performance over the wide operating speed range of the motor. Typically, a latency of one microsecond or less is considered acceptable in many applications that requires a controller with a fast compute engine, a fast ADC, low latency control peripherals and a superior control algorithm.

On a single F2837x or F28004x, it is possible to run two independent FCLs in less than 2 µs while still supporting the high control bandwidth and double sampling of each axis. In order to maintain the goal of measuring the currents of each motor during voltage transitions, the ADC double sampling is interleaved between each motor so that the sampling and subsequent FOC processing does not need to happen back to back. The motor 1 carrier lags motor 2 by a fixed 90°, then the ADC sampling period is consistent across both motors but interleaved between them as shown in Figure 2. Each ADC sample and conversion is followed by the C2000 CPU performing the FOC algorithm and updating the PWMs. In this way, the sample-to-PWM update remains very consistent for each execution, whether it’s the first or second sample of motor 1 or motor 2.

5 Outline of the Fast Current Loop Library

The major challenge in digital motor control systems is the influence of the sample and hold (S/H) , as well as transportation delay inside the loop that slows down the system, impacting its performance at higher frequencies and running speeds. A minimal current loop time not only helps to improve the control bandwidth, but it also enables a higher modulation index (M-I) for the inverter. A higher M-I translates into the higher phase voltage that the inverter can apply on the motor. Higher loop latency will reduce the maximum available voltage and can restrict the rate of current change in the motor, thereby, adversely impacting the controller performance.

To overcome these challenges, a controller with high computational power, right set of control peripherals and superior control algorithm are needed. The TMS320F2837x and TMS20F28004x provide the necessary hardware support for higher performance, and the FCL algorithm from TI that runs on the C2000 MCU provides the needed algorithmic support.

To improve the operational range of FCL, the latency between feedback sampling and PWM update should be as small as possible. Typically, a latency of 2 µS or less is considered acceptable in many applications. Traditionally, this task is implemented using a combination of high end FPGAs, external ADCs and MCUs.

The FCL algorithm utilizes the following features in the F2837x or F28004x MCUs.

• Floating-Point Unit (FPU)
• Trigonometric and Math Unit (TMU)
• Three high speed 12-bit ADCs
• Multiple parallel processing blocks such as Control Law Architecture (CLA)

Figure 3 shows the block diagram of FCL algorithm with its inputs and outputs. The FCL partitions its algorithm across the CPU, CLA and TMU to bring down the latency to under 1.0 µs compared to the acceptable 2.0 µs. Further optimization is possible if the algorithm is written in assembly.

The FCL algorithm supports two types of current regulators, a typical PI controller and a complex controller. The complex controller can provide additional bandwidth over the typical PI controller at higher speeds. Both current regulators are provided for user evaluation. In the example project, the current regulator can be selected by setting the FCL_CNTLR macro appropriately and studying how they compare.

Table 2 lists the FCL API functions and their descriptions.

For more information on the FCL algorithm, the source codes is available at : \ti\c2000\C2000Ware_MotorControl_SDK_version\libraries\fcl\source.

The algorithm is written in a modular format and is able to port over to user platforms using F2837x, F28004x, or F2838x devices if the following conditions are met:

• Motor phase current feedback are read into variables internal to the FCL functions. However, D-axis and Q-axis current feedback are available.
• PWM modules controlling motor phase A, B, and C are linked to the FCL.
• A QEP module connecting to the QEP encoder is linked to the FCL algorithm.
• CLA tasks one through eight are used by the FCL algorithm. This must be accommodated in the user application.