SPRAA85E November   2005  – December 2017 SM320F2812 , SM320F2812-EP , TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F2801 , TMS320F2801-Q1 , TMS320F2802 , TMS320F2802-Q1 , TMS320F28044 , TMS320F2806 , TMS320F2806-Q1 , TMS320F28062 , TMS320F28062-Q1 , TMS320F28062F , TMS320F28062F-Q1 , TMS320F28063 , TMS320F28064 , TMS320F28065 , TMS320F28066 , TMS320F28066-Q1 , TMS320F28067 , TMS320F28067-Q1 , TMS320F28068F , TMS320F28068M , TMS320F28069 , TMS320F28069-Q1 , TMS320F28069F , TMS320F28069F-Q1 , TMS320F28069M , TMS320F28069M-Q1 , TMS320F28075 , TMS320F28075-Q1 , TMS320F2808 , TMS320F2808-Q1 , TMS320F2809 , TMS320F2810 , TMS320F2810-Q1 , TMS320F2811 , TMS320F2811-Q1 , TMS320F2812 , TMS320F2812-Q1 , TMS320F28232 , TMS320F28232-Q1 , TMS320F28234 , TMS320F28234-Q1 , TMS320F28235 , TMS320F28235-Q1 , TMS320F28332 , TMS320F28333 , TMS320F28334 , TMS320F28335 , TMS320F28335-Q1 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28379D , TMS320F28379D-Q1 , TMS320F28379S , TMS320R2811 , TMS320R2812

 

  1.   Programming TMS320x28xx and TMS320x28xxx Peripherals in C/C++
    1.     Trademarks
    2. 1  Introduction
    3. 2  Traditional #define Approach
      1.      Example 1. Traditional #define Macros
      2.      Example 2. Accessing Registers Using #define Macros
    4. 3  Bit Field and Register-File Structure Approach
      1. 3.1 Defining A Register-File Structure
        1.       Example 3. SCI Register-File Structure Definition
        2.       Example 4. SCI Register-File Structure Variables
      2. 3.2 Using the DATA_SECTION Pragma to Map a Register-File Structure to Memory
        1.       Example 5. Assigning Variables to Data Sections
        2.       Example 6. Mapping Data Sections to Register Memory Locations
        3.       Example 7. Accessing a Member of the SCI Register-File Structure
      3. 3.3 Adding Bit-Field Definitions
        1.       Example 8. SCI Control Registers Defined Using Bit Fields
      4. 3.4 Using Unions
        1.       Example 9. Union Definition to Provide Access to Bit Fields and the Whole Register
        2.       Example 10. SCI Register-File Structure Using Unions
        3.       Example 11. Accessing Bit Fields in C/C++
    5. 4  Bit Field and Register-File Structure Advantages
    6. 5  Code Size and Performance Using Bit Fields
      1.      Example 12. TMS320x280x PCLKCR0 Bit-Field Definition
      2.      Example 13. Assembly Code Generated by Bit Field Accesses
      3.      Example 14. Optimization Using the .all Union Member
      4.      Example 15. Optimization Using a Shadow Register
    7. 6  Read-Modify-Write Considerations When Using Bit Fields
      1.      Example 16. A Few Read-Modify-Write Operations
      2. 6.1 Registers That Hardware Can Modify During Read-Modify-Write Operations
        1. 6.1.1 PIEIFRx Registers
          1.        Example 17. Clearing PIEIFRx (x = 1, 2...12) Registers
        2. 6.1.2 GPxDAT Registers
          1.        Example 18. Read-Modify-Write Effects on GPxDAT Registers
          2.        Example 19. Using GPxSET and GPxCLEAR Registers
      3. 6.2 Registers With Write 1-to-Clear Bits.
        1.       Example 20. Read-Modify-Write Operation Inadvertently Modifies Write 1-to-Clear Bits (TCR[TIF])
        2.       Example 21. Using a Shadow Register to Preserve Write 1-to-Clear Bits
      4. 6.3 Register Bits Requiring a Specific Value
        1.       Example 22. Watchdog Check Bits (WDCR[WDCHK])
      5. 6.4 Read-Modify-Write Sensitive Registers
    8. 7  Special Case Peripherals
      1. 7.1 eCAN Control Registers
        1.       Example 23. Invalid eCAN Control Register 16-Bit Write
        2.       Example 24. Using a Shadow Register to Force a 32-Bit Access
      2. 7.2 Byte Peripheral Registers
        1.       Example 25. Invalid Byte Peripheral Register Access
        2.       Example 26. Byte Peripheral Register Access Using “byte_peripheral” Attribute
    9. 8  C2000 Peripheral Driver Library Approach
      1. 8.1 Using the Peripheral Driver Library
        1.       Example 27. SCI-A Driverlib Function Prototype
          1.        Example 28. SCI-A Configuration Using the Driverlib
      2. 8.2 Construction of a Driver Library Function
        1.       Example 29. SCI Register Description Header File (hw_sci.h)
          1.        Example 30. SCI Function Implementation
      3. 8.3 Peripheral Driver Library Advantages
    10. 9  Code Size and Performance Using Driverlib
      1.      Example 31. Inlined ADC_readResult() Function Calls
      2.      Example 32. ADC Function Implementation to be Optimized
      3.      Example 33. Inlined ADC_setupSOC() Function Call
    11. 10 Comparing and Combining Approaches
      1.      Example 34. CPU Timer Bit-Field (Left) and Driverlib (Right) Disassembly Comparison
      2.      Example 35. ADC Bit-Field (Left) and Driverlib (Right) Disassembly Comparison
    12. 11 References
  2.   Revision History

Example 29. SCI Register Description Header File (hw_sci.h)

///////////////////////////////////////////////////////////////////// // // Example register #defines from hw_sci.h // ///////////////////////////////////////////////////////////////////// //******************************************************************* // // The following are defines for the SCI register offsets // //******************************************************************* #define SCI_O_CCR 0x0U // Communications control #define SCI_O_CTL1 0x1U // Control register 1 #define SCI_O_HBAUD 0x2U // Baud rate (high) #define SCI_O_LBAUD 0x3U // Baud rate (low) #define SCI_O_CTL2 0x4U // Control register 2 #define SCI_O_RXST 0x5U // Receive status #define SCI_O_RXEMU 0x6U // Receive emulation buffer #define SCI_O_RXBUF 0x7U // Receive data buffer #define SCI_O_TXBUF 0x9U // Transmit data buffer #define SCI_O_FFTX 0xAU // FIFO transmit register #define SCI_O_FFRX 0xBU // FIFO receive register #define SCI_O_FFCT 0xCU // FIFO control register #define SCI_O_PRI 0xFU // SCI Priority control //******************************************************************* // // The following are defines for the bit fields in the SCICCR register // //******************************************************************* #define SCI_CCR_SCICHAR_S 0U #define SCI_CCR_SCICHAR_M 0x7U // Character length control #define SCI_CCR_ADDRIDLE_MODE 0x8U // ADDR/IDLE Mode control #define SCI_CCR_LOOPBKENA 0x10U // Loop Back enable #define SCI_CCR_PARITYENA 0x20U // Parity enable #define SCI_CCR_PARITY 0x40U // Even or Odd Parity #define SCI_CCR_STOPBITS 0x80U // Number of Stop Bits ...

These #defines are used in combination with a set of “HWREG(x)” macros defined in hw_types.h where x is the address of the of the memory location to be accessed

  • HWREG(x) is used for 32-bit accesses, such as reading a value from a 32-bit counter register.
  • HWREGH(x) is used for 16-bit accesses. This can be used to access a 16-bit register or the upper or lower words of a 32-bit register. This is usually the most efficient macro to use.
  • HWREGB(x) is used for 8-bit accesses using the __byte() intrinsic. For more information, see the TMS320C28x Optimizing C/C++ Compiler User's Guide. It typically should only be used when an 8-bit access is required by the hardware. Otherwise, use HWREGH() and mask and shift out the unwanted bits.
  • HWREG_BP(x) is another macro used for 32-bit accesses, but it uses the __byte_peripheral_32() compiler intrinsic. It is meant to work with the byte peripherals described in Section 7. It tells the compiler that the 32-bit access may not be split into two 16-bit read-modify-write operations since the upper word is not at the expected address offset on a byte peripheral.

These macros used in combination with the register description and base address #defines make up the majority of Driverlib code. Example 30 shows how they are used to implement the SCI_setConfig() function.