SLWU079D March   2012  – April 2016

 

  1.   TSW140x High Speed Data Capture/Pattern Generator Card
    1.     Trademarks
    2. 1 Functionality
      1. 1.1 ADC EVM Data Capture
      2. 1.2 DAC EVM Pattern Generator
    3. 2 Hardware Configuration
      1. 2.1 Power Connections
        1. 2.1.1 Output Power Regulators
      2. 2.2 Switches, Jumpers and Fuses
        1. 2.2.1 Switches and Pushbuttons
        2. 2.2.2 Jumpers
        3. 2.2.3 Fuses
      3. 2.3 LEDs
      4. 2.4 Connectors
        1. 2.4.1 Input LVDS ADC Interface Connector
        2. 2.4.2 JTAG Connector
        3. 2.4.3 Input CMOS ADC Interface Connector
        4. 2.4.4 Output LVDS Connector
        5. 2.4.5 Output CMOS DAC Interface Connector
        6. 2.4.6 USB I/O Connection
    4. 3 Software Start up
      1. 3.1 Installation Instructions
      2. 3.2 USB Interface and Drivers
      3. 3.3 Device ini Files
    5. 4 ADC Data Capture Software Operation
      1. 4.1 Testing a TSW1400 EVM with an ADS5281 EVM
      2. 4.2 Testing a TSW1400EVM with an ADS62P49EVM (CMOS Interface)
    6. 5 TSW1400 Pattern Generator Operation
      1. 5.1 Testing a TSW1400 EVM with a DAC3152 EVM
      2. 5.2 Loading DAC Firmware
      3. 5.3 Configuring TSW1400 for Pattern Generation
      4. 5.4 Testing a TSW1400 EVM with a DAC5688EVM (CMOS Interface)
    7. 6 TSW1405 Functional Description
      1. 6.1 Hardware Description
        1. 6.1.1 Power Connections
        2. 6.1.2 Pushbuttons
        3. 6.1.3 Jumpers
        4. 6.1.4 LEDs
      2. 6.2 Software Operation
        1. 6.2.1 Channel Selection
    8. 7 TSW1406 Functional Description
      1. 7.1 Hardware Description
        1. 7.1.1 Power Connections
        2. 7.1.2 Pushbuttons
        3. 7.1.3 Jumpers
        4. 7.1.4 LEDs
      2. 7.2 Software Operation
    9. 8 Revision History

5.1 Testing a TSW1400 EVM with a DAC3152 EVM

This section describes the pattern generator operation when testing with a DAC3152 EVM that has a LVDS input interface.

  • Power down the TSW1400.
  • Connect J5 of the DAC3152 to connector J4 of the TSW1400.
  • Provide +5 VDC to J12 and return to J13 of the DAC3152 EVM.
  • Provide a 0.5-Vrms, 250-MHz clock to J9 of the DAC3152 EVM.
  • Power up the TSW1400 EVM
  • Start up the HSDC Pro GUI as described in the Software Start Up.
  • A TSW1400 EVM connected to a DAC3152 EVM is shown in Figure 12.

EVM_interface_to DAC3152_lwu079.pngFigure 12. TSW1400 EVM Interfacing to a DAC EVM

NOTE

The FPGA clocks from DAC EVMs to the TSW1400 EVM have to be LVDS level. Exceeding LVDS levels may damage the TSW1400 FPGA.