SLUUCD5 January 2023 BQ27427
| Subclass | Subclass ID | Offset | Type | Name | Value | Unit | ||
|---|---|---|---|---|---|---|---|---|
| Min | Max | Default | ||||||
| Registers | 64 | 2 | H1 | OpConfigB | 0 | FF | 0F | Flag |
| Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 | |
|---|---|---|---|---|---|---|---|---|
| RSVD0 | RSVD0 | RSVD0 | RSVD0 | RSVD1 | SMOOTHEN | RSVD1 | RSVD1 | |
| Default = | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 |
| 0x0F | ||||||||
| SMOOTHEN = | Enables the SOC smoothing feature. True when set. |
| RSVD0 = | Reserved. Default is 0. (Set to 0 for proper operation.) |
| RSVD1 = | Reserved. Default is 1. (Set to 1 for proper operation.) |