SBVS064N December   2005  – November 2016 TPS74201

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable and Shutdown
      2. 7.3.2 Power-Good (VQFN Packages Only)
      3. 7.3.3 Internal Current Limit
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input, Output, and Bias Capacitor Requirements
      2. 8.1.2 Transient Response
      3. 8.1.3 Dropout Voltage
      4. 8.1.4 Output Noise
      5. 8.1.5 Programmable Soft-Start
      6. 8.1.6 Sequencing Requirements
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Protection
    4. 10.4 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Modules
        2. 11.1.1.2 Spice Models
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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Features

  • Input Voltage Range: 0.8 V to 5.5 V
  • Soft-Start (SS) Pin Provides a Linear Start-Up With Ramp Time Set by External Capacitor
  • 1% Accuracy Over Line, Load, and Temperature
  • Supports Input Voltages as Low as 0.8 V With External Bias Supply
  • Adjustable Output (0.8 V to 3.6 V)
  • Ultra-Low Dropout: 55 mV at 1.5 A (Typical)
  • Stable With Any or No Output Capacitor
  • Excellent Transient Response
  • Open-Drain Power-Good (VQFN)
  • Active High Enable

Applications

  • FPGA Applications
  • DSP Core and I/O Voltages
  • Servers
  • Post-Regulation Applications
  • Applications With Special Start-Up Time or Sequencing Requirements

Description

The TPS742 series of low-dropout (LDO) linear regulators provide an easy-to-use, robust power-management solution for a wide variety of applications. User-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and well suited for powering many different types of processors and ASICs. The enable input and power-good output allow easy sequencing with external regulators. This complete flexibility permits the user to configure a solution that meets the sequencing requirements of FPGAs, DSPs, and other applications with special start-up requirements.

A precision reference and error amplifier deliver 1% accuracy over load, line, temperature, and process. Each LDO is stable with low-cost ceramic output capacitors, and the family is fully specified from –40°C to 125°C. The TPS742 devices are offered in a small 5-mm × 5-mm VQFN (RGW) and a small
3.5-mm × 3.5-mm VQFN (RGR) package, yielding a highly compact total solution size. For applications that require additional power dissipation, the DDPAK/TO-263 (KTW) package is also available.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS74201 VQFN (20), RGW 5.00 mm × 5.00 mm
VQFN (20), RGR 3.50 mm × 3.50 mm
DDPAK/TO-263 (7) 8.89 mm × 10.10 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Typical Application Adjustable Output Version

TPS74201 front_fig_adjust_SBVS064.gif

Turnon Response

TPS74201 front_tc_bvs064.gif