ZHCSQ71 March   2022 CC1311P3

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. 功能方框图
  5. Revision History
  6. Device Comparison
  7. Pin Configuration and Functions
    1. 7.1 Pin Diagram – RGZ Package (Top View)
    2. 7.2 Signal Descriptions – RGZ Package
    3. 7.3 Connections for Unused Pins and Modules
  8. Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Power Supply and Modules
    5. 8.5  Power Consumption - Power Modes
    6. 8.6  Power Consumption - Radio Modes
    7. 8.7  Nonvolatile (Flash) Memory Characteristics
    8. 8.8  Thermal Resistance Characteristics
    9. 8.9  RF Frequency Bands
    10. 8.10 861 MHz to 1054 MHz - Receive (RX)
    11. 8.11 861 MHz to 1054 MHz - Transmit (TX) 
    12. 8.12 861 MHz to 1054 MHz - PLL Phase Noise Wideband Mode
    13. 8.13 861 MHz to 1054 MHz - PLL Phase Noise Narrowband Mode
    14. 8.14 359 MHz to 527 MHz - Receive (RX)
    15. 8.15 359 MHz to 527 MHz - Transmit (TX) 
    16. 8.16 359 MHz to 527 MHz - PLL Phase Noise
    17. 8.17 Timing and Switching Characteristics
      1. 8.17.1 Reset Timing
      2. 8.17.2 Wakeup Timing
      3. 8.17.3 Clock Specifications
        1. 8.17.3.1 48 MHz Crystal Oscillator (XOSC_HF)
        2. 8.17.3.2 48 MHz RC Oscillator (RCOSC_HF)
        3. 8.17.3.3 32.768 kHz Crystal Oscillator (XOSC_LF)
        4. 8.17.3.4 32 kHz RC Oscillator (RCOSC_LF)
      4. 8.17.4 Synchronous Serial Interface (SSI) Characteristics
        1. 8.17.4.1 Synchronous Serial Interface (SSI) Characteristics
        2.       38
      5. 8.17.5 UART
        1. 8.17.5.1 UART Characteristics
    18. 8.18 Peripheral Characteristics
      1. 8.18.1 ADC
        1. 8.18.1.1 Analog-to-Digital Converter (ADC) Characteristics
      2. 8.18.2 DAC
        1. 8.18.2.1 Digital-to-Analog Converter (DAC) Characteristics
      3. 8.18.3 Temperature and Battery Monitor
        1. 8.18.3.1 Temperature Sensor
        2. 8.18.3.2 Battery Monitor
      4. 8.18.4 Comparator
        1. 8.18.4.1 Continuous Time Comparator
      5. 8.18.5 GPIO
        1. 8.18.5.1 GPIO DC Characteristics
    19. 8.19 Typical Characteristics
      1. 8.19.1 MCU Current
      2. 8.19.2 RX Current
      3. 8.19.3 TX Current
      4. 8.19.4 RX Performance
      5. 8.19.5 TX Performance
      6. 8.19.6 ADC Performance
  9. Detailed Description
    1. 9.1  Overview
    2. 9.2  System CPU
    3. 9.3  Radio (RF Core)
      1. 9.3.1 Proprietary Radio Formats
    4. 9.4  Memory
    5. 9.5  Cryptography
    6. 9.6  Timers
    7. 9.7  Serial Peripherals and I/O
    8. 9.8  Battery and Temperature Monitor
    9. 9.9  µDMA
    10. 9.10 Debug
    11. 9.11 Power Management
    12. 9.12 Clock Systems
    13. 9.13 Network Processor
  10. 10Application, Implementation, and Layout
    1. 10.1 Reference Designs
  11. 11Device and Documentation Support
    1. 11.1 Device Nomenclature
    2. 11.2 Tools and Software
      1. 11.2.1 SimpleLink™ Microcontroller Platform
    3. 11.3 Documentation Support
    4. 11.4 支持资源
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 术语表
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • RGZ|48
散热焊盘机械数据 (封装 | 引脚)
订购信息

Power Management

To minimize power consumption, the CC1311P3 supports a number of power modes and power management features (see Table 9-2).

Table 9-2 Power Modes
MODESOFTWARE CONFIGURABLE POWER MODESRESET PIN HELD
ACTIVEIDLESTANDBYSHUTDOWN
CPUActiveOffOffOffOff
FlashOnAvailableOffOffOff
SRAMOnOnRetentionOffOff
RadioAvailableAvailableOffOffOff
Supply SystemOnOnDuty CycledOffOff
Register and CPU retentionFullFullPartialNoNo
SRAM retentionFullFullFullNoNo
48 MHz high-speed clock (SCLK_HF)XOSC_HF or
RCOSC_HF
XOSC_HF or
RCOSC_HF
OffOffOff
32 kHz low-speed clock (SCLK_LF)XOSC_LF or
RCOSC_LF
XOSC_LF or
RCOSC_LF
XOSC_LF or RCOSC_LFOffOff
PeripheralsAvailableAvailableOffOffOff
Wake-up on RTCAvailableAvailableAvailableOffOff
Wake-up on pin edgeAvailableAvailableAvailableAvailableOff
Wake-up on reset pinOnOnOnOnOn
Brownout detector (BOD)OnOnDuty CycledOffOff
Power-on reset (POR)OnOnOnOffOff
Watchdog timer (WDT)AvailableAvailablePausedOffOff

In Active mode, the application system CPU is actively executing code. Active mode provides normal operation of the processor and all of the peripherals that are currently enabled. The system clock can be any available clock source (see Table 9-2).

In Idle mode, all active peripherals can be clocked, but the Application CPU core and memory are not clocked and no code is executed. Any interrupt event brings the processor back into active mode.

In Standby mode, only the always-on (AON) domain is active. An external wake-up event or RTC event is required to bring the device back to active mode. MCU peripherals with retention do not need to be reconfigured when waking up again, and the CPU continues execution from where it went into standby mode. All GPIOs are latched in standby mode.

In Shutdown mode, the device is entirely turned off (including the AON domain), and the I/Os are latched with the value they had before entering shutdown mode. A change of state on any I/O pin defined as a wake from shutdown pin wakes up the device and functions as a reset trigger. The CPU can differentiate between reset in this way and reset-by-reset pin or power-on reset by reading the reset status register. The only state retained in this mode is the latched I/O state and the flash memory contents.

Note:

The power, RF and clock management for the CC1311P3 device require specific configuration and handling by software for optimized performance. This configuration and handling is implemented in the TI-provided drivers that are part of the CC1311P3 software development kit (SDK). Therefore, TI highly recommends using this software framework for all application development on the device. The complete SDK with TI-RTOS (optional), device drivers, and examples are offered free of charge in source code.