ZHCSR17 january   2023 ADS9218

ADVANCE INFORMATION  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Thermal Information
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Electrical Characteristics
    6. 6.6  Timing Requirements
    7. 6.7  Switching Characteristics
    8. 6.8  Timing Diagrams
    9. 6.9  Typical Characteristics: ADS9218
    10. 6.10 Typical Characteristics: ADS9217
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Inputs
      2. 7.3.2 Analog Input Bandwidth
      3. 7.3.3 ADC Transfer Function
      4. 7.3.4 Reference
        1. 7.3.4.1 Internal Reference Voltage
        2. 7.3.4.2 External Reference Voltage
      5. 7.3.5 Data Interface
        1. 7.3.5.1 Data Frame Width
        2. 7.3.5.2 Test Patterns for Data Interface
          1. 7.3.5.2.1 User-Defined Test Pattern
          2. 7.3.5.2.2 User-Defined Alternating Test Pattern
          3. 7.3.5.2.3 Ramp Test Pattern
      6. 7.3.6 ADC Sampling Clock Input
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Power-Down Options
    5. 7.5 Programming
      1. 7.5.1 Register Write
      2. 7.5.2 Register Read
      3. 7.5.3 Multiple Devices: Daisy-Chain Topology for SPI Configuration
        1. 7.5.3.1 Register Write With Daisy-Chain
        2. 7.5.3.2 Register Read With Daisy-Chain
    6. 7.6 Register Map
      1. 7.6.1 Register Bank 0
      2. 7.6.2 Register Bank 1
      3. 7.6.3 Register Bank 2
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Data Acquisition (DAQ) Circuit for ≤20-kHz Input Signal Bandwidth
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Data Acquisition (DAQ) Circuit for ≤100-kHz Input Signal Bandwidth
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Application Curves
      3. 8.2.3 Data Acquisition (DAQ) Circuit for ≤1-MHz Input Signal Bandwidth
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  10. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Mechanical Data

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

8.4.1 Layout Guidelines

Figure 8-11 shows a board layout example for the ADS921x. Avoid crossing digital lines with the analog signal path and keep the analog input signals and the reference signals away from noise sources. Use 0.1-μF ceramic bypass capacitors in close proximity to the analog (AVDD_5V and AVDD_1V8), and digital (DVDD_1V8) power-supply pins. Avoid placing vias between the power-supply pins and the bypass capacitors. Place the reference decoupling capacitor close to the device REFIO and REFM pins. Avoid placing vias between the REFIO pin and the bypass capacitors. Connect the GND and REFM pins to a ground plane using short, low-impedance paths.