ZHCSDT4D June 2015 – September 2020 BQ29209-Q1
PRODUCTION DATA
请参考 PDF 数据表获取器件具体的封装图。
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
VPROTECT | Overvoltage detection voltage | 4.3 | V | ||||
VHYS | Overvoltage detection hysteresis | 200 | 300 | 400 | mV | ||
VOA | Overvoltage detection accuracy | TA = 25°C | –10 | 10 | mV | ||
VOA_DRIFT | Overvoltage threshold temperature drift | TA = 0°C to 60°C | –0.4 | 0.4 | mV°/C | ||
TA = –40°C to 110°C | –0.6 | 0.6 | |||||
XDELAY | Overvoltage delay time scale factor | TA = 0°C to 60°C Note: Does not include external capacitor variation. | 6 | 9 | 12 | s/µF | |
TA = –40°C to 110°C Note: Does not include external capacitor variation. | 5.5 | 9 | 13.5 | ||||
XDELAY_CTM(1) | Overvoltage delay time scale factor in Customer Test Mode | 0.08 | s/µF | ||||
ICD(CHG) | Overvoltage detection charging current | 150 | nA | ||||
ICD(DSG) | Overvoltage detection discharging current | 60 | µA | ||||
VCD | Overvoltage detection external capacitor comparator threshold | 1.2 | V | ||||
ICC | Supply current | (VC2–VC1) = (VC1–GND) = 3.5 V (See Figure 8-5.) | 3 | 6 | µA | ||
VOUT | OUT pin drive voltage | (VC2–VC1) or (VC1–GND) > VPROTECT, VDD = 10 V, IOH = 0 | 6 | 8.25 | 9.5 | V | |
(VC2–VC1) or (VC1–GND) = VPROTECT, VDD = VPROTECT, IOH = –100 µA, TA = 0°C to 60°C | 1.75 | 2.5 | V | ||||
(VC2–VC1) and (VC1–GND) < VPROTECT , IOL = 100 µA, TA = 25°C | 200 | mV | |||||
(VC2–VC1) and (VC1–GND) < VPROTECT , IOL = 0 µA, TA = 25°C | 0 | 10 | mV | ||||
VC2 = VC1 = VDD = 4 V, IOL = 100 µA | 200 | mV | |||||
IOH | High-level output current | OUT = 1.75 V, (VC2–VC1) or (VC1–GND) = VPROTECT, VDD = VPROTECT to 10 V, TA = 0°C to 60°C | –100 | µA | |||
IOL | Low-level output current | OUT = 0.05 V, (VC2–VC1) or (VC1–GND) < VPROTECT, VDD = VPROTECT to 10 V, TA = 0°C to 60°C | 30 | 85 | µA | ||
IOH_ZV | High-level short-circuit output current | OUT = 0 V, (VC2–VC1) = (VC1–GND) = VPROTECT VDD = 4 to 10 V | –8 | mA | |||
IIN | Input current at VCx pins | Measured at VC1, (VC2–VC1) = (VC1–GND) = 3.5 V, TA = 0°C to 60°C (See Figure 8-5.) | –0.2 | 0.2 | µA | ||
Measured at VC2, (VC2–VC1) = (VC1–GND) = 3.5 V, TA = 0°C to 60°C (See Figure 8-5.) | 2.5 | µA | |||||
VMM_DET_ON | Cell mismatch detection threshold for turning ON | (VC2–VC1) versus (VC1–GND) and vice-versa when cell balancing is enabled. VC2 = VDD = 7.6 V | 17 | 30 | 45 | mV | |
VMM_DET_OFF | Cell mismatch detection threshold for turning OFF | Delta between (VC2–VC1) and (VC1–GND) when cell balancing is disabled. VC2 = VDD = 7.6 V | –9 | 0 | 9 | mV | |
VCB_EN_ON | Cell balance enable ON threshold | Active LOW pin at CB_EN | 1 | V | |||
VCB_EN_OFF | Cell balance enable OFF threshold | Active HIGH at CB_EN | 2.2 | V | |||
ICB_EN | Cell balance enable ON input current | CB_EN = GND (See Figure 8-6.) | 0.2 | µA | |||
RCB1int | Internal cell balance switch resistance | CB_EN = GND | 300 | Ω | |||
RCB2int | Internal cell balance switch resistance | CB_EN = GND | 235 | Ω |