ZHCSG76A April 2017 – March 2025 INA233
PRODUCTION DATA
The bits in this register correspond to the bits in the STATUS_MFR_SPECIFIC register. Setting a bit in this register blocks the corresponding bit in the STATUS_MFR_SPECIFIC register from having an effect on the ALERT pin.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| Conversion ready | ADC overflow detected | POR event detected | Communications | IN_OP_WARNING | IN_OC_WARNING | IN_OV_WARNING | IN_UV_WARNING |
| R/W-1 | R-1 | R-1 | R/W-1 | R/W-0 | R/W-0 | R/W-0 | R/W-0 |
| Bit | Field | Type | Default | Description |
|---|---|---|---|---|
| 7 | Conversion ready | R/W | 1 | Masks the conversion ready signal to the ALERT pin (masked by default). |
| 6 | ADC overflow detected | R | 1 | Masks the ADC overflow detection |
| 5 | POR event detected | R | 1 | Masks the detection of a power-on-reset event. |
| 4 | Communications | R/W | 1 | Communications or memory fault (or of STATUS_CML) |
| 3 | IN_OP_WARNING | R/W | 0 | Input overpower warning mask |
| 2 | IN_OC_WARNING | R/W | 0 | Input overcurrent warning mask |
| 1 | IN_OV_WARNING | R/W | 0 | Input overvoltage warning mask |
| 0 | IN_UV_WARNING | R/W | 0 | Input undervoltage warning mask |