ZHCSG76A April 2017 – March 2025 INA233
PRODUCTION DATA
Figure 7-2 shows the ALERT pin response to a bus overvoltage limit of 5.6V for a conversion time (tCT) of 1.1ms and averaging set to 1. Figure 7-3 shows the response for the same limit but with the conversion time reduced to 140µs. For the scope shots shown in these figures, persistence is enabled on the ALERT channel. Figure 7-2 and Figure 7-3 show how the ALERT response time can vary depending on when the fault condition occurs relative to the internal ADC clock of the INA233. For fault conditions that are just exceeding the limit threshold, the response time for the ALERT pin can vary from one to two conversion cycles. As mentioned previously, the variation is because of the timing on when the fault event occurs relative to the start time of the internal ADC conversion cycle. For fault events that greatly exceed the limit threshold, the alert can respond in less than one conversion cycle because fewer samples are required for the average to exceed the limit threshold value.