ZHCSG76A April 2017 – March 2025 INA233
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| INPUT | ||||||
| Shunt voltage input range | –81.92 | 81.9175 | mV | |||
| Bus voltage input range(1) | 0 | 36 | V | |||
| CMRR | Common-mode rejection ratio | 0V ≤ VIN+ ≤ 36V | 126 | 140 | dB | |
| VOS | Offset voltage, RTI(2) | Shunt voltage | ±2.5 | ±10 | µV | |
| Bus voltage | ±1.25 | ±7.5 | mV | |||
| VOS (RTI(2)) vs temperature | Shunt voltage, –40°C ≤ TA ≤ +125°C | 0.02 | 0.1 | µV/°C | ||
| Bus voltage, –40°C ≤ TA ≤ +125°C | 10 | 40 | ||||
| PSRR | Power-supply rejection ratio (RTI(2)) | Shunt voltage, 2.7V ≤ VS ≤ 5.5V | 1 | µV/V | ||
| Bus voltage | 0.5 | mV/V | ||||
| IB | Input bias current (IIN+, IIN– pins) | 8 | μA | |||
| VBUS input impedance | 830 | kΩ | ||||
| Input leakage(3) | (IN+) + (IN–), power-down mode | 0.1 | 0.5 | µA | ||
| DC ACCURACY | ||||||
| ADC native resolution | 16 | Bits | ||||
| 1-LSB step size | Shunt voltage | 2.5 | μV | |||
| Bus voltage | 1.25 | mV | ||||
| Shunt voltage gain error | 0.02% | 0.1% | ||||
| Shunt voltage gain error vs temperature | –40°C ≤ TA ≤ +125°C | 5 | 25 | ppm/°C | ||
| Bus voltage gain error | 0.02% | 0.1% | ||||
| Bus voltage gain error vs temperature | –40°C ≤ TA ≤ +125°C | 10 | 50 | ppm/°C | ||
| Power gain error | VBUS = 12V, VIN+ – VIN– = –80mV to 80mV | 0.05% | 0.2% | |||
| Power gain error vs temperature | –40°C ≤ TA ≤ +125°C | 10 | 50 | ppm/°C | ||
| DNL | Differential nonlinearity | ±0.1 | LSB | |||
| tCT | ADC conversion time | CT bit = 000 | 140 | 154 | µs | |
| CT bit = 001 | 204 | 224 | ||||
| CT bit = 010 | 332 | 365 | ||||
| CT bit = 011 | 588 | 646 | ||||
| CT bit = 100 | 1.1 | 1.21 | ms | |||
| CT bit = 101 | 2.116 | 2.328 | ||||
| CT bit = 110 | 4.156 | 4.572 | ||||
| CT bit = 111 | 8.244 | 9.068 | ||||
| SMBus | ||||||
| SMBus timeout(4) | 28 | 35 | ms | |||
| DIGITAL INPUT/OUTPUT | ||||||
| Input capacitance | 3 | pF | ||||
| Leakage input current | 0V ≤ VSCL ≤
VVS, 0V ≤ VSDA ≤ VVS, 0V ≤ VAlert ≤ VVS, 0V ≤ VA0 ≤ VVS, 0V ≤ VA1 ≤ VVS | 0.5 | 2 | µA | ||
| VIH | High-level input voltage | SDA pin | 1.4 | 6 | V | |
| VIL | Low-level input voltage | SDA pin | –0.3 | 0.4 | V | |
| VOL | Low-level output voltage | IOL = 3mA, SDA and ALERT pins | 0 | 0.4 | V | |
| Hysteresis | 500 | mV | ||||
| POWER SUPPLY | ||||||
| Operating supply range | 2.7 | 5.5 | V | |||
| IQ | Quiescent current | 310 | 400 | µA | ||
| Quiescent current, power-down (shutdown) mode | 2 | 5 | µA | |||
| VPOR | Power-on-reset (POR) threshold voltage | 2 | V | |||