TIDUEW7 May   2020

 

  1.    Description
  2.    Resources
  3.    Features
  4.    Applications
  5.    Design Images
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Processor – i.MX 6ULL Applications Processor
      2. 2.2.2 i.MX 6ULL Memory Interfaces
        1. 2.2.2.1 DDR3L
        2. 2.2.2.2 Quad SPI NOR Flash
        3. 2.2.2.3 eMMC iNAND
        4. 2.2.2.4 SD Card Connector
      3. 2.2.3 USB to UART Converter
      4. 2.2.4 USB Ports
      5. 2.2.5 LCD Screen Connector
      6. 2.2.6 JTAG Header
      7. 2.2.7 USB2ANY Header
      8. 2.2.8 Functional Switches and Status LEDs
      9. 2.2.9 GPIO Expansion Connector
    3. 2.3 Highlighted Products
      1. 2.3.1 TPS6521815 - Power Management IC
      2. 2.3.2 DP83849I - Dual Ethernet PHY
      3. 2.3.3 INA3221 - Current Monitor
      4. 2.3.4 Reset Scheme
      5. 2.3.5 TPS2054B, TPS22964C - Auxiliary Load Switches
    4. 2.4 System Design Theory
      1. 2.4.1 Power Estimation
      2. 2.4.2 Power Sequencing
      3. 2.4.3 I2C Device Chain
      4. 2.4.4 Clock Scheme
      5. 2.4.5 BOOT Configuration
      6. 2.4.6 PCB Floor Planning
  8. 3Getting Started, Testing Setup, and Test Results
    1. 3.1 Getting Started with Hardware and Software
      1. 3.1.1 Hardware
        1. 3.1.1.1 On-board LED Information
      2. 3.1.2 Software
        1. 3.1.2.1 Booting of TIDA-050043
        2. 3.1.2.2 Example Linux Commands for Testing TIDA-050043
  9. 4Design Files
    1. 4.1 Schematics
    2. 4.2 Bill of Materials
    3. 4.3 CAD Files
    4. 4.4 Gerber Files
    5. 4.5 Assembly Drawings
  10. 5Software Files
  11. 6Related Documentation
    1. 6.1 Trademarks
    2. 6.2 Third-Party Products Disclaimer

1.1 Key System Specifications

Table 1. Key System Specifications

PARAMETER SPECIFICATIONS DETAILS
Processor i.MX 6ULL, ARM Cortex-A7 Applications Processor, MCIMX6Y2CVM08AB Section 2.2.1
PMIC TPS6521815 user-programmable PMIC with automatic sequencing and DVFS Section 2.3.1
Memory 4-Gb DDR3L (512 MB), 256-Mb QSPI NOR-Flash (32 MB), 8GB eMMC 5.0, SD v3.0 interface Section 2.2.2
Ethernet Dual-port ethernet interface - TI DP83849I PHY and 0845-2R1T-E4 RJ45 jack from Bel Fuse Section 2.3.2
Debug method (USB-to-UART) FTDI FT230X is required to implement USB to serial UART conversion Section 2.2.3
USB ports 5x USB Type-A ports (USB2517I-JZX hub IC) and 1x micro-AB port for USB OTG (Amphenol 10104111-0001LF) Section 2.2.4
LCD display RGB TFT 40-pin connector (Molex 54132-4062) for LCD display (Newhaven Display NHD-2.4-240320CF-CTXI#-F), compatible with touch-screen controller (TI TSC2046IPWR) Section 2.2.5
JTAG header JTAG connection to i.MX 6ULL processor with 50-mil pitch, 10-pin header Section 2.2.6
USB2ANY header Debug method for PMIC separate from processor I2C bus. Provided by USB2ANY (standard 100-mil pitch, 10-pin header) Section 2.2.7
Current monitoring 2x TI INA3221 devices are used to monitor current through 6 rails in the system Section 2.3.3
Operation with Coin Cell Coin cell for i.MX 6ULL SNVS input. Using DCDC6 of TPS6521815 PMIC, system always powers SNVS before full power-up sequence begins. Section 2.3.4
Tactile inputs, visual feedback Push-buttons and status LEDs connected to GPIOs of the processor to assist with debugging software Section 2.2.8