SPRUJ51 june   2023

 

  1.   1
  2. 1Abstract
  3. 2EVM Revisions and Assembly Variants
    1. 2.1 Inside the Box
    2. 2.2 EMC, EMI and ESD Compliance
  4.   Trademarks
  5. 3System Description
    1. 3.1 Key Features
      1. 3.1.1 Processor
      2. 3.1.2 Power Supply
      3. 3.1.3 Memory
      4. 3.1.4 JTAG Emulator
      5. 3.1.5 Supported Interfaces and Peripherals
      6. 3.1.6 Expansion Connectors Headers to Support Application Specific Add On Boards
    2. 3.2 Functional Block Diagram
    3. 3.3 AM62x-Low Power SK EVM Interface Mapping
    4. 3.4 Power ON OFF Procedures
      1. 3.4.1 Power-On Procedure
      2. 3.4.2 Power-Off Procedure
      3. 3.4.3 Power Test Points
    5. 3.5 Peripheral and Major Component Description
      1. 3.5.1  Clocking
      2. 3.5.2  Reset
      3. 3.5.3  OLDI Display Interface
      4. 3.5.4  CSI Interface
      5. 3.5.5  Audio Codec Interface
      6. 3.5.6  HDMI Display Interface
      7. 3.5.7  JTAG Interface
      8. 3.5.8  Test Automation Header
      9. 3.5.9  UART Interface
      10. 3.5.10 USB Interface
        1. 3.5.10.1 USB 2.0 Type A Interface
        2. 3.5.10.2 USB 2.0 Type C Interface
      11. 3.5.11 Memory Interfaces
        1. 3.5.11.1 LPDDR4 Interface
        2. 3.5.11.2 OSPI Interface
        3. 3.5.11.3 MMC Interfaces
          1. 3.5.11.3.1 MMC0 - eMMC Interface
          2. 3.5.11.3.2 MMC1 - Micro SD Interface
          3. 3.5.11.3.3 MMC2 - M2 Key E Interface
        4. 3.5.11.4 EEPROM
      12. 3.5.12 Ethernet Interface
        1. 3.5.12.1 CPSW Ethernet PHY1 Default Configuration
        2. 3.5.12.2 CPSW Ethernet PHY2 Default Configuration
      13. 3.5.13 GPIO Port Expander
      14. 3.5.14 GPIO Mapping
      15. 3.5.15 Power
        1. 3.5.15.1 Power Requirements
        2. 3.5.15.2 Power Input
        3. 3.5.15.3 Power Supply
        4. 3.5.15.4 Power Sequencing
        5. 3.5.15.5 AM62x 17x17 SoC Power
        6. 3.5.15.6 Current Monitoring
      16. 3.5.16 AM62x-Low Power SK EVM User Setup and Configuration
        1. 3.5.16.1 EVM DIP Switches
        2. 3.5.16.2 Boot Modes
        3. 3.5.16.3 User Test LEDs
      17. 3.5.17 Expansion Headers
        1. 3.5.17.1 User Expansion Connector
        2. 3.5.17.2 MCU Connector
        3. 3.5.17.3 PRU Connector
      18. 3.5.18 Push Buttons
      19. 3.5.19 I2C Address Mapping
  6. 4Known Issues and Modifications
  7. 5Revision History
  8. 6IMPORTANT NOTICE AND DISCLAIMER

3.5.1 Clocking

The clocking architectue of the AM62x Low-Power SK EVM is shown below.

GUID-20230519-SS0I-74PW-D6D7-KVNXGF2X313X-low.png Figure 3-6 Clock architecture

A clock generator of part number LMK1C1104PWR is used to drive the 25MHz clock to the SOC and two Ethernet PHYs. LMK1C1104PWR is a 1:4 LVCMOS clock buffer, which takes the 25MHz crystal/LVCMOS referenceinput and provides four 25MHz LVCMOS clock outputs. The source for the clock buffer shall be either the CLKOUT0 pin from the SOC or a 25MHz oscillator, the selection is made using a set of resistors. By default, an oscillator is used as input to the clock buffer on the AM62x Low Power SK EVM . Output Y2 and Y3 of the clock buffer are used as reference clock inputs for two Gigabit Ethernet PHYs. Output Y4 of the clock buffer are used as reference clock inputs for CSI Camera inetrace.

There is one external crystal attached to the AM62x SoC to provide clock to the WKUP domain of the SoC (32.768 KHz).

GUID-20230519-SS0I-VPQQ-CHBF-HT1GKDZVJ1KN-low.png Figure 3-7 SoC Wakeup Domain Clock

Clock inputs required for peripherals such as XDS110, FT4232, HDMI transmitter and audio codec are generated locally using separate crystals or oscillators. Crystals or oscillators used to provide the reference clocks to the EVM peripherals are shown in the table below.

Table 3-3 Peripheral Clocking Table
PeripheralMfr.Part #DescriptionFrequency
XDS110 emulator(Y3)XRCGB16M000FXN01R0CRY 16.000MHz 8pF SMD16.000MHz
FT4232 Bridge(Y4)445I23D12M00000CRY12.000MHz 18pF SMD12.000MHz
Audio Codec(U64)KC3225Z12.2880C1KX00OSC12.288MHz CMOS SMD12.288MHz
HDMITransmitter(U9)KC3225Z12.2880C1KX00OSC12.288MHz CMOS SMD12.288MHz

The clock required by the HDMI transmitter can be provided by either the on board oscillator or the SoC’s AUDIO_EXT_REFCLK1, which can be selected through a resistor mux. SoC’s EXT_REFCLK1 is used to provide clock to the User Expansion Connector on the SK EVM. The 32 KHz clock to the M.2 module is provided by WKUP_CLKOUT0 of AM62x SoC through a voltage translational buffer.