SPRUJ51 june   2023

 

  1.   1
  2. 1Abstract
  3. 2EVM Revisions and Assembly Variants
    1. 2.1 Inside the Box
    2. 2.2 EMC, EMI and ESD Compliance
  4.   Trademarks
  5. 3System Description
    1. 3.1 Key Features
      1. 3.1.1 Processor
      2. 3.1.2 Power Supply
      3. 3.1.3 Memory
      4. 3.1.4 JTAG Emulator
      5. 3.1.5 Supported Interfaces and Peripherals
      6. 3.1.6 Expansion Connectors Headers to Support Application Specific Add On Boards
    2. 3.2 Functional Block Diagram
    3. 3.3 AM62x-Low Power SK EVM Interface Mapping
    4. 3.4 Power ON OFF Procedures
      1. 3.4.1 Power-On Procedure
      2. 3.4.2 Power-Off Procedure
      3. 3.4.3 Power Test Points
    5. 3.5 Peripheral and Major Component Description
      1. 3.5.1  Clocking
      2. 3.5.2  Reset
      3. 3.5.3  OLDI Display Interface
      4. 3.5.4  CSI Interface
      5. 3.5.5  Audio Codec Interface
      6. 3.5.6  HDMI Display Interface
      7. 3.5.7  JTAG Interface
      8. 3.5.8  Test Automation Header
      9. 3.5.9  UART Interface
      10. 3.5.10 USB Interface
        1. 3.5.10.1 USB 2.0 Type A Interface
        2. 3.5.10.2 USB 2.0 Type C Interface
      11. 3.5.11 Memory Interfaces
        1. 3.5.11.1 LPDDR4 Interface
        2. 3.5.11.2 OSPI Interface
        3. 3.5.11.3 MMC Interfaces
          1. 3.5.11.3.1 MMC0 - eMMC Interface
          2. 3.5.11.3.2 MMC1 - Micro SD Interface
          3. 3.5.11.3.3 MMC2 - M2 Key E Interface
        4. 3.5.11.4 EEPROM
      12. 3.5.12 Ethernet Interface
        1. 3.5.12.1 CPSW Ethernet PHY1 Default Configuration
        2. 3.5.12.2 CPSW Ethernet PHY2 Default Configuration
      13. 3.5.13 GPIO Port Expander
      14. 3.5.14 GPIO Mapping
      15. 3.5.15 Power
        1. 3.5.15.1 Power Requirements
        2. 3.5.15.2 Power Input
        3. 3.5.15.3 Power Supply
        4. 3.5.15.4 Power Sequencing
        5. 3.5.15.5 AM62x 17x17 SoC Power
        6. 3.5.15.6 Current Monitoring
      16. 3.5.16 AM62x-Low Power SK EVM User Setup and Configuration
        1. 3.5.16.1 EVM DIP Switches
        2. 3.5.16.2 Boot Modes
        3. 3.5.16.3 User Test LEDs
      17. 3.5.17 Expansion Headers
        1. 3.5.17.1 User Expansion Connector
        2. 3.5.17.2 MCU Connector
        3. 3.5.17.3 PRU Connector
      18. 3.5.18 Push Buttons
      19. 3.5.19 I2C Address Mapping
  6. 4Known Issues and Modifications
  7. 5Revision History
  8. 6IMPORTANT NOTICE AND DISCLAIMER

I2C Address Mapping

There are three I2C interfaces used in AM62x-Low Power SK EVM board.

  • SoC_I2C0 Interface: SoC I2C [0] is connected to Board ID EEPROM, User Expansion Connector Header, USB PD controller, PRU header, PMIC and OLDI Display Touch interface.
  • SOC I2C1 Interface: SoC I2C [1] is connected to Test Automation Header, Current Monitors, Temperature Sensors, Audio Codec, HDMI Transmitter, , GPIO Port Expander.
  • SOC I2C2 Interface: Soc I2C [2] is Connected to the User Expansion Connector Header and CSI Camera Connector.
  • MCU I2C0 Interface: MCU I2C [0] is Connected to MCU Header.

GUID-20221024-SS0I-3F29-HZR4-8TGN8LKJCDXJ-low.png Figure 3-30 I2C Interface Block Diagram
Table 3-28 I2C Mapping Table
I2C Port Device/Function Part# I2C Address
SoC_I2C0 Board ID EEPROM M24512-DFMC6TG 0x51
SoC_I2C0 User Expansion Connector <connector interface>
SoC_I2C0 USB PD Controller TPS65988DHRSHR 0x38, 0x3F
SoC_I2C0 PRU Header <connector interface>
SoC_I2C0 OLDI Display Touch Interface <connector interface>
SoC_I2C1 PMIC TPS65219 0x30
SoC_I2C1 Test Automation Header <connector interface>
SoC_I2C1 Current Monitors INA231AIYFDR

0x40, 0x41, 0x4C, 0x45, 0x4E &

0x46

SoC_I2C1 Temperature Sensors TMP100NA/3K 0x48, 0x49
SoC_I2C1 Audio Codec TLV320AIC3106IRGZT 0x1B
SoC_I2C1 HDMI Transmitter SiI9022ACNU 0x3B, 0x3F, 0x62
SoC_I2C1 GPIO Port Expander TCA6424ARGJR 0x22, 0x23
SoC_I2C2 CSI Camera Connector <connector interface>
SoC_I2C2 User Expansion Connector <connector interface>
MCU_I2C0 MCU Header <connector interface>
Others
BOOTMODE_I2C I2C Bootmode Buffer TCA6424ARGJR 0x22
BOOTMODE_I2C Test Automation Header <connector interface>