Maximum repetitive peak voltage and working voltage

Maximum repetitive (V_IORM) and working voltage (V_IOWM) are both intended to quantify the ability of an isolator to handle high voltage across its barrier on a continuous, day-to-day basis, throughout its lifetime. For example, an isolator used to provide gate control to a high-side IGBT in a motor drive system sees a periodic trapezoidal potential difference across its isolation barrier as the IGBT emitter, to which the isolator’s secondary side is referred, moves up and down between high-voltage dc rails. This trapezoidal stress is present whenever the motor is operational.

V_IORM and V_IOWM are defined in IEC 60747-5-5 and VDE 0884-10. V_IORM is defined as the maximum repetitive peak voltage that the isolator can withstand, whereas V_IOWM is defined as the maximum rms, or equivalent dc voltage, that the isolator can withstand over a specified long term. For sinusoidal stress voltages, V_IORM and V_IOWM are equivalent. Both values are specified by the manufacturer of the isolator based on the manufacturer’s testing.

VDE 0884-10 Ed 1.0 and IEC 60747-5-5 check for V_IOWM and V_IORM through a partial discharge test that looks for localized discharges inside the insulation that indicate degradation in the insulation. The partial discharge test is performed along with the test for V_IOTM using Method A tests during certification and Method B1 during production test.

The soon to be released VDE 0884-10 Ed 2.0 also includes an additional requirement on V_IORM and V_IOWM. To comply with this new upcoming standard, the manufacturer of a reinforced isolator must provide accelerated-stress test data to the certifying agencies to prove that the isolator can handle 1.2 times V_IOWM/V_IORM for more than 37.5 years. During accelerated-stress tests, the isolator is subjected to varying levels of high voltage, much higher than its expected working voltage, and the corresponding times to breakdown are recorded. Then, the voltage vs. time curve is extrapolated for lifetime prediction at the expected working voltage. For isolators that use silicon-dioxide (SiO₂) as the insulation material, the relation between time-to-failure and stress voltage follows an exponential relationship. Consequently, the log of expected time to failure reduces linearly with voltage stress applied. Therefore, VDE 0884-10 Ed 2.0 requires SiO₂-based isolators to use the same relation to curve-fit accelerated test data.

Figure 2 shows the test setup used to perform accelerated-stress lifetime tests. All terminals on side one of the isolator are shorted together, and all terminals of side two of the isolator are shorted together. The required high voltage, a 60 Hz sine wave, is applied between sides one and two to stress the isolation barrier using a high-voltage source such as the AR7715 Highpot. The stress voltage is applied continuously until the impedance between side one to side two drops below 4 MΩ.

At each voltage point, batches of at least 32 devices are stressed. The resulting times to failure of the devices are fit to a Weibull distribution, and statistical analysis is used to find the time to failure that corresponds to <1 ppm failure rate. This time is then plotted in the voltage vs. time to failure plot. The procedure is repeated at different voltage points to generate the entire voltage vs time to failure curve. This curve, when extrapolated to greater than 37.5 years, and further de-rated by an extrapolation factor of 1.2, gives the value of V_IOWM/V_IORM. For a more comprehensive understanding of the accelerated-stress test and the related extrapolation, refer to the VDE 0884-10 Ed 2.0 standard.

An accelerated-stress test is performed both at high temperature (150°C) as well as room temperature (25°C).

The values of V_IORM and V_IOWM derived from accelerated stress tests, as mandated by VDE 0884-10 Ed 2.0, give more confidence in the long-term reliability of the isolator for continuously applied high voltage. The same cannot be said about the partial discharge test mandated by IEC 60747-5-5 and VDE 0884-10 Ed 1.0, since there is no established relationship between long-term withstand capability and partial discharge.

Figure 3 shows the expected lifetime projection of the ISO7842 based on accelerated-stress testing of the isolation barrier used over five different wafer lots and a total of more than 2000 devices. The shaded region indicates the safe operating area (SOA) of this device. Note that the actual test data is intentionally not shown in the figure. The SOA includes a factor of 1.2 de-rating as required by the standard and is also based on a more conservative statistical extrapolation than required by the standard. The SOA can be used to estimate the expected lifetime at any given operating voltage.

The <<1 ppm line indicates that much less than one device in one million is expected to lie outside the SOA.

As shown in the SOA curve of Figure 3 , the ISO7842 can withstand a V_IORM of 2121 Vpk and a V_IOWM of 1500 Vrms for more than 40 years. These levels of V_IORM and V_IOWM are the highest offered by any isolator in the industry, in a standard 16-pin SOIC package.