Maximum transient isolation voltage and isolation withstand voltage

Maximum transient isolation voltage (V_IOTM) and the isolation withstand voltage (V_ISO) are both intended to quantify the ability of an isolator to handle high voltage across the isolation barrier for very short periods of time. During normal operation, the stress voltage across the isolation barrier is limited by the maximum system line voltage. However, unintentional disturbances in the system, for example, noise on the supplies caused by arcing or load changes, could briefly cause the voltage across the isolator to be several times the line voltage. The isolator should be able to handle these transient over-voltages without damage.

V_IOTM is defined by IEC 60747-5-5 and VDE 0884-10 as the peak transient voltage that the isolator can handle without breaking down. This is tested during certification by stressing the isolator at V_IOTM for 60 seconds, followed by a partial discharge test at 1.6 times V_IORM for 10 seconds (see next section for the definition of V_IORM). This is called Method A testing. V_IOTM is tested in the production manufacturing process by stressing every device at V_IOTM for one second, followed by a partial discharge test at 1.875 times V_IORM for one second. This is called Method B1 testing. Partial discharge is localized discharge inside the insulation material and is indicative of insulation integrity. More details on Method A and Method B1 test profiles can be found in the appendix.

The value of V_IOTM also can be used to determine compliance to system-level standards, such as the IEC 60664-1, that require a certain level of temporary overvoltage to be tolerated by an insulation barrier, for five seconds, depending on the system voltage. For example, an isolator with a V_IOTM of greater than 6222 Vpk (4400 Vrms) meets the temporary overvoltage criterion for reinforced insulation per IEC 60664-1 for line voltages up to 1000 Vrms.

V_ISO is defined per UL 1577 as the rms value of voltage that the isolator can handle without breakdown for 60 seconds. It is tested during certification by applying a sinusoidal stress of V_ISO for 60 seconds. In production V_ISO is tested by stressing every device for 1.2 times V_ISO for one second. For sinusoidal stress V_IOTM and V_ISO are equivalent.

TI tests its digital isolators to comply with UL, IEC and VDE requirements. To perform testing for V_IOTM or V_ISO, an HT9464 high-voltage isolation test system is used. This equipment is capable of applying the required transient overvoltage profile according to Method A and Method B1, as well as measuring partial discharge. This test is performed by connecting all pins of side one and all pins of side two, then applying the voltage across the isolation barrier ( Figure 1 ).

The ISO7842 meets a V_ISO of 5700 Vrms per UL and a V_IOTM of 8000 Vpk per VDE0884-10 and IEC 60747-5-5. This is based on Method A testing over more than five wafer lots, and a total of more than 2000 devices. Also, each and every ISO7842 device will be production-tested per Method B1, with the stress voltage greater than 6840 Vrms to meet UL requirements. These levels of V_ISO and V_IOTM are the highest offered by any isolator in the industry in a standard 16-pin SOIC package.

It must be noted that ISO7842 easily meets the 4400 Vrms requirement for temporary overvoltage required for reinforced isolation as per IEC 60664-1 for line voltages up to 1000 Vrms.