SBAK020 April   2025 ADC3683-SEP

PRODUCTION DATA  

  1.   1
  2.   Single-Event Effects Test Report of the ADC3683-SEP dual 18-bit 65-MSPS ADC
  3.   Trademarks
  4. 1 Introduction
  5. 2 Single-Event Effects
  6. 3 Irradiation Facility and Setup
  7. 4 Depth, Range, and LETEFF Calculations
  8. 5 Test Setup and Procedures
  9. 6 Destructive Single-Event Effects (DSEE)
  10. 7 Single-Event Transients (SET)
  11. 8 Event Rate Calculations
  12. 9 Summary
  13. 10References

1 Introduction

The ADC3683-SEP is a low noise, ultra-low power 18 bit 65 MSPS high-speed dual channel ADC. Designed for lowest noise performance, the device delivers a noise spectral density of -160dBFS/Hz combined with excellent linearity and dynamic range. The ADC3683-SEP offers DC precision together with IF sampling support making it designed for a wide range of applications. High-speed control loops benefit from the short latency as low as only one clock cycle. The ADC consumes only 94mW/ch at 65MSPS and the power consumption scales well with lower sampling rates.

The device uses a serial LVDS (SLVDS) interface to output the data which minimizes the number of digital interconnects. The device supports two-lane, one-lane and half-lane options. The device is a pin-to-pin compatible with the 14 bit, 125MSPS ADC3664- SEP. The ADC3683-SEP comes in a 40-pin RSB VQFN package (5 × 5mm) and supports an extended temperature range from -55 to +105°C.

Description1 Device Information
Generic Part Number ADC3683-SEP
Orderable Part Number ADC3683RSBTSEP
Device Function Low-noise dual 18-bit 65-MSPS ADC
Device Package 40-Pin RSB VQFN (5 × 5mm)
Technology TI C021 65nm CMOS
Exposure Facility Radiation Effects Facility Cyclotron Institute, Texas A&M University (15MeV/Nucleon)
Heavy Ion Fluence per Run Up to 1 × 107 ions/cm2
Irradiation Temperature 25°C (for SET testing) and 125°C (for SEL testing)
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