ZHCSOY9 december   2021 UCC28781

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Detailed Pin Description
      1. 7.3.1  BUR Pin (Programmable Burst Mode)
      2. 7.3.2  FB Pin (Feedback Pin)
      3. 7.3.3  REF Pin (Internal 5-V Bias)
      4. 7.3.4  VDD Pin (Device Bias Supply)
      5. 7.3.5  P13 and SWS Pins
      6. 7.3.6  S13 Pin
      7. 7.3.7  IPC Pin (Intelligent Power Control Pin)
      8. 7.3.8  RUN Pin (Driver and Bias Source for Isolator)
      9. 7.3.9  PWMH and AGND Pins
      10. 7.3.10 PWML and PGND Pins
      11. 7.3.11 SET Pin
      12. 7.3.12 RTZ Pin (Sets Delay for Transition Time to Zero)
      13. 7.3.13 RDM Pin (Sets Synthesized Demagnetization Time for ZVS Tuning)
      14. 7.3.14 XCD Pin
      15. 7.3.15 CS, VS, and FLT Pins
    4. 7.4 Device Functional Modes
      1. 7.4.1  Adaptive ZVS Control with Auto-Tuning
      2. 7.4.2  Dead-Time Optimization
      3. 7.4.3  EMI Dither and Dither Fading Function
      4. 7.4.4  Control Law Across Entire Load Range
      5. 7.4.5  Adaptive Amplitude Modulation (AAM)
      6. 7.4.6  Adaptive Burst Mode (ABM)
      7. 7.4.7  Low Power Mode (LPM)
      8. 7.4.8  First Standby Power Mode (SBP1)
      9. 7.4.9  Second Standby Power Mode (SBP2)
      10. 7.4.10 Startup Sequence
      11. 7.4.11 Survival Mode of VDD (INT_STOP)
      12. 7.4.12 System Fault Protections
        1. 7.4.12.1  Brown-In and Brown-Out
        2. 7.4.12.2  Output Over-Voltage Protection (OVP)
        3. 7.4.12.3  输入过压保护 (IOVP)
        4. 7.4.12.4  FLT 引脚上的过热保护 (OTP)
        5. 7.4.12.5  CS 引脚上的过热保护 (OTP)
        6. 7.4.12.6  可编程过功率保护 (OPP)
        7. 7.4.12.7  峰值功率限制 (PPL)
        8. 7.4.12.8  输出短路保护 (SCP)
        9. 7.4.12.9  过流保护 (OCP)
        10. 7.4.12.10 External Shutdown
        11. 7.4.12.11 Internal Thermal Shutdown
      13. 7.4.13 Pin Open/Short Protections
        1. 7.4.13.1 Protections on CS pin Fault
        2. 7.4.13.2 Protections on P13 pin Fault
        3. 7.4.13.3 Protections on RDM and RTZ pin Faults
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application Circuit
      1. 8.2.1 Design Requirements for a 60-W, 15-V ZVSF Bias Supply Application with a DC Input
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Bulk Capacitance and Minimum Bulk Voltage
        2. 8.2.2.2 Transformer Calculations
          1. 8.2.2.2.1 Primary-to-Secondary Turns Ratio (NPS)
          2. 8.2.2.2.2 Primary Magnetizing Inductance (LM)
          3. 8.2.2.2.3 Primary Winding Turns (NP)
          4. 8.2.2.2.4 Secondary Winding Turns (NS)
          5. 8.2.2.2.5 Auxiliary Winding Turns (NA)
          6. 8.2.2.2.6 Winding and Magnetic Core Materials
        3. 8.2.2.3 Calculation of ZVS Sensing Network
        4. 8.2.2.4 Calculation of BUR Pin Resistances
        5. 8.2.2.5 Calculation of Compensation Network
      3. 8.2.3 Application Curves
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1  General Considerations
      2. 10.1.2  RDM and RTZ Pins
      3. 10.1.3  SWS Pin
      4. 10.1.4  VS Pin
      5. 10.1.5  BUR Pin
      6. 10.1.6  FB Pin
      7. 10.1.7  CS Pin
      8. 10.1.8  AGND Pin
      9. 10.1.9  PGND Pin
      10. 10.1.10 Thermal Pad
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Receiving Notification of Documentation Updates
    2. 11.2 支持资源
    3. 11.3 Trademarks
    4. 11.4 静电放电警告
    5. 11.5 术语表
  13. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.4.12.3 输入过压保护 (IOVP)

UCC28781 在 FLT 引脚上提供输入 OVP 功能。图 7-39 展示了用于输入 OVP 检测的应用电路。电阻分压器可检测大容量电容器电压，当 VFLT 高于 4.5V 且持续时间超过 750µs 时会触发 IOVP 故障。750µs 延迟有助于降低对线路浪涌条件下突然出现的大容量电压尖峰的敏感性，从而使输出电压不会意外下降。IOVP 故障置位后，开关立即停止，VVDD 重新启动。当 VVDD 达到下一个 VDD 周期的 VVDD(ON) 时，控制器会在开关之前首先确认 VFLT，从而避免开关器件暴露在高压应力条件下。当 VFLT 低于 4.43V 时清除故障。

如果需要超过 750µs 的延迟，FLT 引脚和 AGND 引脚之间的滤波电容器可以产生额外的可编程延迟。如果滤波电容器过大，当 RUN 引脚被拉高后 VFLT 上升到高于 VNTCTH 的斜升时间超过 tFLT(NTC) 时，它可能会触发 FLT 引脚上的 OTP 故障。由于控制器会在 VFLT 高于 2.5V 时禁用电流源，因而电阻分压器设计无需考虑来自 FLT 引脚的 50µA 电流源的失调电压影响。

FLT 引脚上的内部 5.5V 钳位器件的目标是在其中一个 IOVP 上检测电阻器发生短路时保护引脚不超过电压限值。最大钳位电流为 150µA，电阻分压器设计需要考虑这一限制。

GUID-38189699-6A07-47BE-91FA-BC0ED1A67275-low.gif图 7-39 用于输入 OVP 的大容量电容器电压检测