ZHCS089G February   2011  – September 2017 TPS65185

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      典型应用原理图
  4. 4 修订历史记录
  5. 5 说明 （续）
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements: Data Transmission
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Wake-Up and Power-Up Sequencing
      2. 8.3.2  Dependencies Between Rails
      3. 8.3.3  Soft Start
      4. 8.3.4  Active Discharge
      5. 8.3.5  VPOS/VNEG Supply Tracking
      6. 8.3.6  V3P3 Power Switch
      7. 8.3.7  VCOM Adjustment
        1. 8.3.7.1 Kick-Back Voltage Measurement
        2. 8.3.7.2 Storing the VCOM Power-Up Default Value in Memory
      8. 8.3.8  Fault Handling And Recovery
      9. 8.3.9  Power Good Pin
      10. 8.3.10 Interrupt Pin
      11. 8.3.11 Panel Temperature Monitoring
        1. 8.3.11.1 NTC Bias Circuit
        2. 8.3.11.2 Hot, Cold, and Temperature-Change Interrupts
        3. 8.3.11.3 Typical Application of the Temperature Monitor
    4. 8.4 Device Functional Modes
      1. 8.4.1 SLEEP
      2. 8.4.2 STANDBY
      3. 8.4.3 ACTIVE
      4. 8.4.4 Mode Transitions
        1. 8.4.4.1 SLEEP → ACTIVE
        2. 8.4.4.2 SLEEP → STANDBY
        3. 8.4.4.3 STANDBY → ACTIVE
        4. 8.4.4.4 ACTIVE → STANDBY
        5. 8.4.4.5 STANDBY → SLEEP
        6. 8.4.4.6 ACTIVE → SLEEP
    5. 8.5 Programming
      1. 8.5.1 I2C Bus Operation
    6. 8.6 Register Maps
      1. 8.6.1  Thermistor Readout (TMST_VALUE) Register (address = 0x00h) [reset = N/A]
        1. Table 3. TMST_VALUE Register Field Descriptions
      2. 8.6.2  Enable (ENABLE) Register (address = 0x01h) [reset = 0h]
        1. Table 4. ENABLE Register Field Descriptions
      3. 8.6.3  Voltage Adjustment (VADJ) Register (address = 0x02h) [reset = 23h]
        1. Table 5. VADJ Register Field Descriptions
      4. 8.6.4  VCOM 1 (VCOM1) Register (address = 0x03h) [reset = 7Dh]
        1. Table 6. VCOM1 Register Field Descriptions
      5. 8.6.5  VCOM 2 (VCOM2) Register (address = 0x04h) [reset = 04h]
        1. Table 7. VCOM2 Register Field Descriptions
      6. 8.6.6  Interrupt Enable 1 (INT_EN1) Register (address = 0x05h) [reset = 7Fh]
        1. Table 8. INT_EN1 Register Field Descriptions
      7. 8.6.7  Interrupt Enable 2 (INT_EN2) Register (address = 0x06h) [reset = FFh]
        1. Table 9. INT_EN2 Register Field Descriptions
      8. 8.6.8  Interrupt 1 (INT1) Register (address = 0x07h) [reset = 0h]
        1. Table 10. INT1 Register Field Descriptions
      9. 8.6.9  Interrupt 2 (INT2) Register (address = 0x08h) [reset = N/A]
        1. Table 11. INT2 Register Field Descriptions
      10. 8.6.10 Power-Up Sequence 0 (UPSEQ0) Register (address = 0x09h) [reset = E4h]
        1. Table 12. UPSEQ0 Register Field Descriptions
      11. 8.6.11 Power-Up Sequence 1 (UPSEQ1) Register (address = 0x0Ah) [reset = 55h]
        1. Table 13. UPSEQ1 Register Field Descriptions
      12. 8.6.12 Power-Down Sequence 0 (DWNSEQ0) Register (address = 0x0Bh) [reset = 1Eh]
        1. Table 14. DWNSEQ0 Register Field Descriptions
      13. 8.6.13 Power-Down Sequence 1 (DWNSEQ1) Register (address = 0x0Ch) [reset = E0h]
        1. Table 15. DWNSEQ1 Register Field Descriptions
      14. 8.6.14 Thermistor 1 (TMST1) Register (address = 0x0Dh) [reset = 20h]
        1. Table 16. TMST1 Register Field Descriptions
      15. 8.6.15 Thermistor 2 (TMST2) Register (address = 0x0Eh) [reset = 78h]
        1. Table 17. TMST2 Register Field Descriptions
      16. 8.6.16 Power Good Status (PG) Register (address = 0x0Fh) [reset = 0h]
        1. Table 18. PG Register Field Descriptions
      17. 8.6.17 Revision and Version Control (REVID) Register (address = 0x10h) [reset = 45h]
        1. Table 19. REVID Register Field Descriptions
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 器件支持
      1. 12.1.1 第三方产品免责声明
    2. 12.2 文档支持
      1. 12.2.1 相关文档
    3. 12.3 接收文档更新通知
    4. 12.4 社区资源
    5. 12.5 商标
    6. 12.6 静电放电警告
    7. 12.7 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.5 Electrical Characteristics

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT VOLTAGE
VIN Input voltage range 3 3.7 6 V
VUVLO Undervoltage lockout threshold VIN falling 2.9 V
VHYS Undervoltage lockout hysteresis VIN rising 400 mV
INPUT CURRENT
IQ Operating quiescent current into VIN Device switching, no load 5.5 mA
ISTD Operating quiescent current into VIN Device in standby mode 130 µA
ISLEEP Shutdown current Device in sleep mode 3.5 10 µA
INTERNAL SUPPLIES
VINT_LDO Internal supply 2.7 V
CINT_LDO Nominal output capacitor Capacitor tolerance ±10% 1 4.7 µF
VREF Internal supply 2.25 V
CREF Nominal output capacitor Capacitor tolerance ±10% 3.3 4.7 µF
DCDC1 (POSITIVE BOOST REGULATOR)
VIN Input voltage range 3 3.7 6 V
PG Power good threshold Fraction of nominal output voltage 90%
Power good time-out Not tested in production 50 ms
VOUT Output voltage range 16 V
DC set tolerance –4.5% 4.5%
IOUT Output current 250 mA
RDS(ON) MOSFET on resistance VIN = 3.7 V 350 mΩ
ILIMIT Switch current limit (TPS65185) 1.5 A
Switch current limit (TPS651851) 2.5
Switch current accuracy –30% 30%
fSW Switching frequency 1 MHz
LDCDC1 Inductor 2.2 µH
CDCDC1 Nominal output capacitor Capacitor tolerance ±10% 1 2 × 4.7 µF
ESR Output capacitor ESR 20 mΩ
DCDC2 (INVERTING BUCK-BOOST REGULATOR)
VIN Input voltage range 3 3.7 6 V
PG Power good threshold Fraction of nominal output voltage 90%
Power good time-out Not tested in production 50 ms
VOUT Output voltage range –16 V
DC set tolerance –4.5% 4.5%
IOUT Output current 250 mA
RDS(ON) MOSFET on resistance VIN = 3.7 V 350 mΩ
ILIMIT Switch current limit 1.5  A
Switch current accuracy –30% 30%
LDCDC1 Inductor 4.7 µH
CDCDC1 Nominal output capacitor Capacitor tolerance ±10% 1 3 × 4.7 µF
ESR Capacitor ESR 20 mΩ
LDO1 (VPOS)
VPOS_IN Input voltage range 15.2 16 16.8 V
PG Power good threshold Fraction of nominal output voltage 90%
Power good time-out Not tested in production 50 ms
VSET Output voltage set value VIN = 16 V,
VSET[2:0] = 0x3h to 0x6h		 14.25 15 V
VINTERVAL Output voltage set resolution VIN = 16 V 250 mV
VOUTTOL Output tolerance VSET = 15 V, ILOAD = 20 mA, 3 V ≤ VIN< 5.9 V –1% 1%
VDROPOUT Dropout voltage ILOAD = 120 mA 250 mV
VLOADREG Load regulation – DC ILOAD = 10% to 90% 1%
ILOAD Load current range (TPS65185) VIN ≥ 3 V 120 mA
Load current range (TPS651851) 3 V ≤ VIN< 3.6 V 150
VIN ≥ 3.6 V 200
ILIMIT Output current limit (TPS65185) VIN ≥ 3 V 120 mA
Output current limit (TPS651851) 3 V ≤ VIN< 3.6 V 150
VIN ≥ 3.6 V 200
RDIS Discharge impedance to ground Enabled when rail is disabled 800 1000 1200 Ω
Mismatch to any other RDIS –2% 2%
CLDO1 Nominal output capacitor Capacitor tolerance ±10% 1 4.7 µF
LDO2 (VNEG)
VNEG_IN Input voltage range 15.2 16 16.8 V
PG Power good threshold Fraction of nominal output voltage 90%
Power good time-out Not tested in production 50 ms
VSET Output voltage set value VIN = –16 V
VSET[2:0] = 0x3h to 0x6h		 –15 –14.25 V
VINTERVAL Output voltage set resolution VIN = –16 V 250 mV
VOUTTOL Output tolerance VSET = –15 V, ILOAD = –20 mA –1% 1%
VDROPOUT Dropout voltage ILOAD = 120 mA 250 mV
VLOADREG Load regulation – DC ILOAD = 10% to 90% 1%
ILOAD Load current range 3 V ≤ VIN< 3.6 V (TPS65185 and TPS651851) 120 mA
VIN ≥ 3.6 V (TPS65185 and TPS651851) 200
ILIMIT Output current limit 3 V ≤ VIN< 3.6 V (TPS65185) 180 mA
3 V ≤ VIN< 3.6 V (TPS651851) 158
VIN ≥ 3.6 V (TPS65185 and TPS651851) 200
RDIS Discharge impedance to ground Enabled when rail is disabled 800 1000 1200 Ω
Mismatch to any other RDIS –2% 2%
TSS Soft-start time Not tested in production 1 ms
CLDO2 Nominal output capacitor Capacitor tolerance ±10% 1 4.7 µF
LD01 (POS) AND LDO2 (VNEG) TRACKING
VDIFF Difference between VPOS and VNEG VSET = ±15 V,
ILOAD = ±20 mA, 0°C to 60°C ambient, 3 V ≤ VIN< 5.9 V		 –50 50 mV
VCOM DRIVER
IVCOM Drive current 15 mA
VCOM Allowed operating range Outside this range VCOM is shut down and VCOMF interrupt is set –5.5 1 V
Accuracy VCOM[8:0] = 0x07Dh
(–1.25 V), VIN = 3.4 V to 4.2 V, no load 		–0.8% 0.8%
VCOM[8:0] = 0x07Dh
(–1.25 V), VIN = 3 V to 6 V, no load 		–1.5% 1.5%
Output voltage range –5.11 0 V
Resolution 1LSB 10 mV
Max number of EEPROM writes VCOM calibration 100
RIN Input impedance, HiZ state HiZ = 1 150 MΩ
RDIS Discharge impedance to ground VCOM_CTRL = low, Hi-Z = 0 800 1000 1200 Ω
Mismatch to any other RDIS –2% 2%
CVCOM Nominal output capacitor Capacitor tolerance ±10% 3.3 4.7 µF
CP1 (VDDH) CHARGE PUMP
VDDH_IN Input voltage range 15.2 16 16.8 V
PG Power good threshold Fraction of nominal output voltage 90%
Power good time-out Not tested in production 50 ms
VFB Feedback voltage 0.998 V
Accuracy ILOAD = 2 mA –2% 2%
VDDH_OUT Output voltage range VSET = 22 V, ILOAD = 2 mA, R6 = 1MΩ, R10 = 47.5 kΩ 21 22 23 V
VSET = 25 V, ILOAD = 2 mA, R6 = 1MΩ, R10 = 41.6 kΩ 24 25 26
VSET = 28 V, ILOAD = 2 mA, R6 = 1MΩ, R10 = 37 kΩ 27 28 29
ILOAD Load current range (TPS65185) 10 mA
Load current range (TPS651851) 15
fSW Switching frequency 560 kHz
RDIS Discharge impedance to ground Enabled when rail is disabled 800 1000 1200 Ω
Mismatch to any other RDIS –2% 2%
CD Driver capacitor 10 nF
CO Output capacitor 1 2.2 µF
CP2 (VEE) NEGATIVE CHARGE PUMP
VEE_IN Input voltage range 15.2 16 16.8 V
PG Power good threshold Fraction of nominal output voltage 90%
Power good time-out Not tested in production 50 ms
VFB Feedback voltage –0.994 V
Accuracy ILOAD = 2 mA –2% 2%
VEE_OUT Output voltage range VSET = –20 V, ILOAD = 3 mA –21 –20 –19 V
ILOAD Load current range (TPS65185) 12 mA
Load current range (TPS651851) 15
fSW Switching frequency 560 kHz
RDIS Discharge impedance to ground Enabled when rail is disabled 800 1000 1200 Ω
Mismatch to any other RDIS –2% 2%
CD Driver capacitor 10 nF
CO Nominal output capacitor Capacitor tolerance ±10% 1 2.2 µF
THERMISTOR MONITOR(1)
ATMS Temperature to voltage ratio Not tested in production –0.0161 V/°C
OffsetTMS Offset Temperature = 0°C 1.575 V
VTMS_HOT Temp hot trip voltage (T = 50°C) TEMP_HOT_SET = 0x8C 0.768 V
VTMS_COOL Temp hot escape voltage (T = 45°C) TEMP_COOL_SET = 0x82 0.845 V
VTMS_MAX Maximum input level 2.25 V
RNTC_PU Internal pullup resistor 7.307 kΩ
RLINEAR External linearization resistor 43 kΩ
ADCRES ADC resolution Not tested in production, 1 bit 16.1 mV
ADCDEL ADC conversion time Not tested in production 19 µs
TMSTTOL Accuracy Not tested in production –1 1 LSB
LOGIC LEVELS AND TIMING CHARTERISTICS (SCL, SDA, PWR_GOOD, PWRx, WAKEUP)
VOL Output low threshold level IO = 3 mA, sink current
(SDA, nINT, PWR_GOOD)		 0.4 V
VIL Input low threshold level 0.4 V
VIH Input high threshold level 1.2 V
I(bias) Input bias current VIO = 1.8 V 1 µA
tdeglitch Deglitch time, WAKEUP pin Not tested in production 500 µs
Deglitch time, PWRUP pin Not tested in production 400
tdischarge Discharge delay Not tested in production 100(2) ms
fSCL SCL clock frequency 400 kHz
I2C slave address 7-bit address 0 × 68h(3)
OSCILLATOR
fOSC Oscillator frequency 9 MHz
Frequency accuracy TA = –40°C to 85°C –10% 10%
THERMAL SHUTDOWN
TSHTDWN Thermal trip point 150 °C
Thermal hysteresis 20 °C
(1) 10-kΩ Murata NCP18XH103F03RB thermistor (1%) in parallel with a linearization resistor (43 kΩ, 1%) are used at TS pin for panel temperature measurement.
(2) Contact factory for 50-ms, 200-ms or 400-ms option.
(3) Contact TI for alternate address of 0 × 48h.