SLVS719H June   2008  – June 2026 TL1963A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics: TL1963A (for DCQ, KTT package)
    6. 5.6 Electrical Characteristics: TL1963A (for DCY Package)
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 SHDN
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Undervoltage Lockout
      4. 6.3.4 Thermal Shutdown
      5. 6.3.5 Current Limit
      6. 6.3.6 Overload Recovery
      7. 6.3.7 Output Voltage Noise
      8. 6.3.8 Protection Features
        1. 6.3.8.1 For Legacy Chip Only
        2. 6.3.8.2 For Both Legacy and New Chip
    4. 6.4 Device Functional Modes
      1. 6.4.1 Device Functional Mode Comparison
      2. 6.4.2 Normal Operation
      3. 6.4.3 Dropout Operation
      4. 6.4.4 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Input/Output Capacitance and Transient Response
      2. 7.1.2 Reverse Current
      3. 7.1.3 Feed-Forward Capacitor
      4. 7.1.4 Estimating Junction Temperature
      5. 7.1.5 Power Dissipation (PD)
    2. 7.2 Typical Applications
      1. 7.2.1 Kelvin Sense Connection with SENSE pin
      2. 7.2.2 Design Requirements
      3. 7.2.3 Detailed Design Procedure
      4. 7.2.4 Application Curve
      5. 7.2.5 Paralleling Regulators for Higher Output Current (Legacy chip only)
        1. 7.2.5.1 Design Requirements
        2. 7.2.5.2 Detailed Design Procedure (Legacy chip only)
        3. 7.2.5.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
      3. 7.4.3 Thermal Considerations
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

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7.1.5 Power Dissipation (PD)

Circuit reliability requires consideration of the device power dissipation, location of the circuit on the printed circuit board (PCB), and correct sizing of the thermal plane. The PCB area around the regulator must have few or no other heat-generating devices that cause added thermal stress.

To first-order approximation, power dissipation in the regulator depends on the input-to-output voltage difference and load conditions. The following equation calculates power dissipation (PD).

Equation 7. P D = ( V I N - V O U T ) × I O U T
Note:

The correct selection of the system voltage rails can minimize power dissipation and therefore achieve greater efficiency. For the lowest power dissipation use the minimum input voltage required for correct output regulation.

For devices with a thermal pad, the primary heat conduction path for the device package is through the thermal pad to the PCB. Solder the thermal pad to a copper pad area under the device. This pad area must contain an array of plated vias that conduct heat to additional copper planes for increased heat dissipation.

The maximum power dissipation determines the maximum allowable ambient temperature (TA) for the device. According to the following equation, power dissipation and junction temperature are most often related by the junction-to-ambient thermal resistance (RθJA) of the combined PCB and device package and the temperature of the ambient air (TA).

Equation 8. T J = T A + ( R θ J A × P D )

Thermal resistance (RθJA) is highly dependent on the heat-spreading capability built into the particular PCB design, and therefore varies according to the total copper area, copper weight, and location of the planes. The JEDEC standard PCB and copper-spreading area determine the junction-to-ambient thermal resistance listed in the Thermal Information table and are used as a relative measure of package thermal performance.