ZHCS020J January 2011 – March 2021 OPA2835 , OPA835
PRODUCTION DATA
Test conditions unless otherwise noted: VS+ = +2.7 V, VS– = 0 V, VOUT = 1 Vpp, RF = 0 Ω, RL = 2 kΩ, G = 1 V/V, input and output referenced to mid-supply, VIN_CM = mid-supply – 0.5 V. TA = 25°C
Figure 7-1 Small-Signal Frequency Response
Figure 7-3 Noninverting Pulse
Response
Figure 7-5 Slew Rate vs Output Voltage Step
Figure 7-7 Harmonic Distortion vs Frequency
Figure 7-9 Harmonic Distortion vs Output Voltage
Figure 7-11 Output Voltage Swing vs Load Resistance
Figure 7-13 Output Impedance vs Frequency
Figure 7-15 Series Output Resistor vs Capacitive Load
Figure 7-17 Open Loop Gain vs Frequency
Figure 7-19 Crosstalk vs Frequency
Figure 7-21 Input Offset Voltage
Figure 7-23 Input Offset Voltage Drift
Figure 7-25 Input Offset Current vs Free-Air Temperature
Figure 7-2 Large-Signal Frequency
Response
Figure 7-4 Inverting Pulse Response
Figure 7-6 Output Overdrive Recovery
Figure 7-8 Harmonic Distortion vs Load Resistance
Figure 7-10 Harmonic Distortion vs Gain
Figure 7-12 Output Saturation Voltage vs Load Current
Figure 7-14 Frequency Response With Capacitive Load
Figure 7-16 Input Referred Noise vs Frequency
Figure 7-18 Common-Mode/Power Supply Rejection Ratios vs Frequency
Figure 7-20 Power Down Response
Figure 7-22 Input Offset Voltage vs Free-Air Temperature
Figure 7-24 Input Offset Current
Figure 7-26 Input Offset Current Drift