SLVSJB5
November 2025
MSPM0G5187
ADVANCE INFORMATION
1
1
Features
2
Applications
3
Description
4
Functional Block Diagram
5
Device Comparison
5.1
Device Comparison Chart
6
Pin Configuration and Functions
6.1
Pin Diagrams
6.2
Pin Attributes
11
6.3
Signal Descriptions
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
6.4
Connections for Unused Pins
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Supply Current Characteristics
7.5.1
RUN/SLEEP Modes
7.5.2
STOP/STANDBY Modes
7.5.3
SHUTDOWN Mode
7.6
Power Supply Sequencing
7.6.1
Power Supply Ramp
7.6.2
POR and BOR
7.7
Flash Memory Characteristics
7.8
Timing Characteristics
7.9
Clock Specifications
7.9.1
System Oscillator (SYSOSC)
7.9.2
Low Frequency Oscillator (LFOSC)
7.9.3
System Phase Lock Loop (SYSPLL)
7.9.4
USB Frequency Lock Loop (USBFLL)
7.9.5
Low Frequency Crystal/Clock
7.9.6
High Frequency Crystal/Clock
7.10
Digital IO
7.10.1
Electrical Characteristics
7.10.2
Switching Characteristics
7.11
Analog Mux VBOOST
7.12
ADC
7.12.1
Electrical Characteristics
7.12.2
Switching Characteristics
7.12.3
Linearity Parameters
7.12.4
Typical Connection Diagram
7.13
Temperature Sensor
7.14
VREF1
7.14.1
Voltage Characteristics (VREF1)
7.14.2
Electrical Characteristics (VREF1)
7.15
VREF2
7.15.1
Voltage Characteristics (VREF2)
7.15.2
Electrical Characteristics (VREF2)
7.16
Comparator (COMP)
7.16.1
Comparator Electrical Characteristics
7.17
I2C
7.17.1
I2C Characteristics
7.17.2
I2C Filter
7.17.3
I2C Timing Diagram
7.18
SPI
7.18.1
SPI
7.18.2
SPI Timing Diagram
7.19
UART
7.20
USB Specifications
7.20.1
USB Characteristics (USB mode)
7.21
Serial Audio
7.22
TIMx
7.23
Emulation and Debug
7.23.1
SWD Timing
8
Detailed Description
8.1
Functional Block Diagram
8.2
CPU
8.3
Operating Modes
8.3.1
Functionality by Operating Mode (MSPM0G5187)
8.4
Power Management Unit (PMU)
8.5
Clock Module (CKM)
8.6
DMA
8.7
Events
8.8
Memory
8.8.1
Memory Organization
8.8.2
Peripheral File Map
8.8.3
Peripheral Interrupt Vector
8.9
Flash Memory
8.10
SRAM
8.11
GPIO
8.12
IOMUX
8.13
ADC
8.14
Temperature Sensor
8.15
VREF
8.16
COMP
8.17
Security
8.18
AESADV
8.19
Keystore
8.20
CRC-P
8.21
Edge AI NPU
8.22
Serial Communication Interfaces
8.22.1
UNICOMM (UART/I2C/SPI)
8.22.1.1
UART (UNICOMM)
8.22.1.2
I2C (UNICOMM)
8.22.1.3
SPI (UNICOMM)
8.22.2
Universal Serial Bus (USB)
8.22.3
Digital Audio Interface - I2S/TDM
8.23
Low-Frequency Sub System (LFSS)
8.24
RTC_B
8.25
IWDT_B
8.26
WWDT
8.27
Timers (TIMx)
8.28
Device Analog Connections
8.29
Input/Output Diagrams
8.30
Serial Wire Debug Interface
8.31
Boot Strap Loader (BSL)
8.32
Device Factory Constants
8.33
Identification
9
Applications, Implementation, and Layout
9.1
Typical Application
9.1.1
Schematic
10
Device and Documentation Support
10.1
Getting Started and Next Steps
10.2
Device Nomenclature
10.3
Tools and Software
10.4
Documentation Support
10.5
Support Resources
10.6
Trademarks
10.7
Electrostatic Discharge Caution
10.8
Glossary
11
Revision History
12
Mechanical, Packaging, and Orderable Information
封装选项
机械数据 (封装 | 引脚)
PM|64
MTQF008B
散热焊盘机械数据 (封装 | 引脚)
订购信息
slvsjb5_oa
1
Features
Core
Arm®
32-bit
Cortex®
-M0+ CPU with memory protection unit, frequency up to 80 MHz
PSA-L1 Certification targeted
Operating characteristics
Extended temperature: –40°C up to 125°C
Wide supply voltage range: 1.62V to 3.6V
Memories
Up to 128KB of flash memory with error correction code (ECC)
Dual-bank with address swap for OTA updates
8KB data flash bank with ECC protection
Up to 32kB SRAM with ECC protection or hardware parity
High-performance analog peripherals
One 12-bit 1.6Msps analog-to-digital converter (ADC) with up to 26 external channels
Configurable 1.6Msps with VREF1 or 0.9Msps with VREF2
14-bit effective resolution at 100ksps with hardware averaging
One high-speed comparator (COMP) with integrated 8-bit reference DAC
32ns propagation delay in high-speed mode
Support low-power mode operation down to <1µA
Programmable analog connections between ADC and COMP
Two voltage references (VREF)
VREF1: Configurable 1.4V or 2.5V internal voltage reference (with external VREF cap)
VREF2: Configurable 1.4V or 2.5V internal voltage reference (cap-less)
Integrated temperature sensor
Optimized low-power modes
RUN: 106µA/MHz (CoreMark)
SLEEP: 34µA/MHz
STOP: 199µA at 4MHz
STANDBY: 1.5µA at 32kHz with RTC and full SRAM and state retention
SHUTDOWN: 88nA with IO wake-up capability
Intelligent digital peripherals
12-channel DMA controller
Neural-network Processing Unit (NPU)
Highly Optimized for Deep Convolutional Neural Networks (CNN)
Variable weights and data lengths
8-bit and 4-bit weights
8-bit and 4-bit data
1.28GOPS (Giga Operations Per Second) at 80MHz
Up to 10x NN inferencing performance improvement vs SW techniques
Real-time control focused Edge AI Models
Arc fault (AFCI) example
Motor fault example
Electrocardiogram (ECG) example
Four timers support up to 14 PWM channels
Two 16-bit general-purpose timers
One 16-bit general-purpose timer supports low-power operation in STANDBY mode
One 16-bit advanced timers with deadband support and complimentary outputs up to 8 PWM channels
One basic software timer including 4 independent configurable 16-bit counters
Ability to daisy-chian 2 of the 16-bit counters to form a 32-bit counter
Ability to generate 2x interrupt driven PWMs
Two windowed watchdog timers (WWDT), one independent watchdog timer (IWDT)
RTC with alarm and calendar mode
Enhanced communication interfaces
Four configurable serial interfaces (UNICOMM)
Two supporting UART (LIN) or I
2
C (SMBus/PMBus)
One supporting UART or SPI
One supporting SPI interface up to 32Mbits/s
One USB2.0 interface supports full-speed (12-Mbps) compliant device and host mode functionality
Crystal-less USB device operation
Up to 8 bi-directional endpoints
One digital audio interface supporting several standardized serial interfaces to audio device
Transfer modes support
Controller transmitter / receiver
Target transmitter / receiver
Formats support
Standard (UM11732) I2S
Codec LSB / MSB Justified
DSP serial interface format that supports up to eight audio channels per data pin
PCM (short and long frame)
TDM Classic/I2S/Left Justified/Right Justified Formats up to 8 slots per frame
Clock system
Internal 4 to 32MHz oscillator (SYSOSC) with up to ±1.2% accuracy
Phase-locked loop (PLL) up to 80 MHz
Internal 32kHz low-frequency oscillator (LFOSC) with ±3% accuracy
Internal 60MHz USB FLL oscillator with ±0.25% accuracy
External 4 to 48MHz crystal oscillator (HFXT)
External 32kHz crystal oscillator (LFXT)
External clock input
Security
AES accelerator with support for GCM/GMAC, CCM/CBC-MAC, CBC, CTR
Secure key storage for up to four AES keys
Flexible firewalls for protecting code and data
Cyclic redundancy checker (CRC-16, CRC-32)
Flexible I/O features
Up to 59 total GPIOs
Two 5V-tolerant open-drain IOs
Three high-drive IOs with 20mA drive strength
Two high-speed IOs
Development support
2-pin serial wire debug (SWD)
Package options
64-pin LQFP (PM) (0.5mm pitch)
48-pin LQFP (PT) (0.5mm pitch)
48-pin VQFN (RGZ) (0.5mm pitch)
32-pin VQFN (RHB) (0.5mm pitch)
28-pin DSBGA (YCJ) (0.35mm pitch)
28-pin WQFN (RUY) (0.4mm pitch)
24-pin VQFN (RGE) (0.5mm pitch)
20-pin VSSOP (DGS) (0.5mm pitch)
Family members
(also see
Device Comparison
)
MSPM0G5187: 128KB flash, 32KB RAM, Edge AI NPU
Development kits and software
(also see
Tools and Software
)
LP-MSPM0G5187
LaunchPad™
development kit
MSPM0 Software Development Kit (SDK)