The serial peripheral interface (SPI) peripherals in these devices support the following key features:
- Support ULPCLK/2 bit rate and up to 32Mbits/s in both controller and peripheral mode (1)
- Configurable as a controller or a peripheral
- Support for up to 4 chip select for both
controller and peripheral
- Supports single parity for transmit and
receive
- Programmable clock prescaler and bit rate
- Programmable data frame size from 4 bits to 16 bits (controller mode) and 7 bits to 16 bit (peripheral mode)
- Transmit and receive FIFOs (4 entries each with 16 bits per entry) supporting DMA data transfer
- Supports TI mode and Motorola mode
- Support single bit parity in both transmit and receive paths
- See SPI (UNICOMM)
Features for detailed information on supported
features
Table 8-15 SPI (UNICOMM)
Features
| SPI Features |
(Advanced) |
SPI1 (Basic) |
| UNICOMM Instance |
UC2 |
UC3 |
| Controller and
Peripheral mode |
Yes |
Yes |
| Supports
Parity function |
Yes |
Yes |
| Supports
Repeat mode transfer |
Yes |
- |
| Supports
Receive timeout |
Yes |
- |
| Supports
Command/Data control |
Yes |
- |
| Supports 4
chip selects |
Yes |
- |
For more details, see the SPI (UNICOMM) chapter of
the MSPM0 G-Series 80-MHz
Microcontrollers Technical Reference
Manual.