SLVSJB5 November   2025 MSPM0G5187

ADVANCE INFORMATION  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Functional Block Diagram
  6. Device Comparison
    1. 5.1 Device Comparison Chart
  7. Pin Configuration and Functions
    1. 6.1 Pin Diagrams
    2. 6.2 Pin Attributes
      1.      11
    3. 6.3 Signal Descriptions
      1.      13
      2.      14
      3.      15
      4.      16
      5.      17
      6.      18
      7.      19
      8.      20
      9.      21
      10.      22
      11.      23
      12.      24
      13.      25
      14.      26
      15.      27
    4. 6.4 Connections for Unused Pins
  8. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current Characteristics
      1. 7.5.1 RUN/SLEEP Modes
      2. 7.5.2 STOP/STANDBY Modes
      3. 7.5.3 SHUTDOWN Mode
    6. 7.6  Power Supply Sequencing
      1. 7.6.1 Power Supply Ramp
      2. 7.6.2 POR and BOR
    7. 7.7  Flash Memory Characteristics
    8. 7.8  Timing Characteristics
    9. 7.9  Clock Specifications
      1. 7.9.1 System Oscillator (SYSOSC)
      2. 7.9.2 Low Frequency Oscillator (LFOSC)
      3. 7.9.3 System Phase Lock Loop (SYSPLL)
      4. 7.9.4 USB Frequency Lock Loop (USBFLL)
      5. 7.9.5 Low Frequency Crystal/Clock
      6. 7.9.6 High Frequency Crystal/Clock
    10. 7.10 Digital IO
      1. 7.10.1  Electrical Characteristics
      2. 7.10.2 Switching Characteristics
    11. 7.11 Analog Mux VBOOST
    12. 7.12 ADC
      1. 7.12.1 Electrical Characteristics
      2. 7.12.2 Switching Characteristics
      3. 7.12.3 Linearity Parameters
      4. 7.12.4 Typical Connection Diagram
    13. 7.13 Temperature Sensor
    14. 7.14 VREF1
      1. 7.14.1 Voltage Characteristics (VREF1)
      2. 7.14.2 Electrical Characteristics (VREF1)
    15. 7.15 VREF2
      1. 7.15.1 Voltage Characteristics (VREF2)
      2. 7.15.2 Electrical Characteristics (VREF2)
    16. 7.16 Comparator (COMP)
      1. 7.16.1 Comparator Electrical Characteristics
    17. 7.17 I2C
      1. 7.17.1 I2C Characteristics
      2. 7.17.2 I2C Filter
      3. 7.17.3 I2C Timing Diagram
    18. 7.18 SPI
      1. 7.18.1 SPI
      2. 7.18.2 SPI Timing Diagram
    19. 7.19 UART
    20. 7.20 USB Specifications
      1. 7.20.1 USB Characteristics (USB mode)
    21. 7.21 Serial Audio
    22. 7.22 TIMx
    23. 7.23 Emulation and Debug
      1. 7.23.1 SWD Timing
  9. Detailed Description
    1. 8.1  Functional Block Diagram
    2. 8.2  CPU
    3. 8.3  Operating Modes
      1. 8.3.1 Functionality by Operating Mode (MSPM0G5187)
    4. 8.4  Power Management Unit (PMU)
    5. 8.5  Clock Module (CKM)
    6. 8.6  DMA
    7. 8.7  Events
    8. 8.8  Memory
      1. 8.8.1 Memory Organization
      2. 8.8.2 Peripheral File Map
      3. 8.8.3 Peripheral Interrupt Vector
    9. 8.9  Flash Memory
    10. 8.10 SRAM
    11. 8.11 GPIO
    12. 8.12 IOMUX
    13. 8.13 ADC
    14. 8.14 Temperature Sensor
    15. 8.15 VREF
    16. 8.16 COMP
    17. 8.17 Security
    18. 8.18 AESADV
    19. 8.19 Keystore
    20. 8.20 CRC-P
    21. 8.21 Edge AI NPU
    22. 8.22 Serial Communication Interfaces
      1. 8.22.1 UNICOMM (UART/I2C/SPI)
        1. 8.22.1.1 UART (UNICOMM)
        2. 8.22.1.2 I2C (UNICOMM)
        3. 8.22.1.3 SPI (UNICOMM)
      2. 8.22.2 Universal Serial Bus (USB)
      3. 8.22.3 Digital Audio Interface - I2S/TDM
    23. 8.23 Low-Frequency Sub System (LFSS)
    24. 8.24 RTC_B
    25. 8.25 IWDT_B
    26. 8.26 WWDT
    27. 8.27 Timers (TIMx)
    28. 8.28 Device Analog Connections
    29. 8.29 Input/Output Diagrams
    30. 8.30 Serial Wire Debug Interface
    31. 8.31 Boot Strap Loader (BSL)
    32. 8.32 Device Factory Constants
    33. 8.33 Identification
  10. Applications, Implementation, and Layout
    1. 9.1 Typical Application
      1. 9.1.1 Schematic
  11. 10Device and Documentation Support
    1. 10.1 Getting Started and Next Steps
    2. 10.2 Device Nomenclature
    3. 10.3 Tools and Software
    4. 10.4 Documentation Support
    5. 10.5 Support Resources
    6. 10.6 Trademarks
    7. 10.7 Electrostatic Discharge Caution
    8. 10.8 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

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订购信息

Boot Strap Loader (BSL)

The boot strap loader (BSL) enables configuration of the device as well as programming of the device memory through a serial interface such as UART, I2C, or USB. Access to the device memory and configuration through the BSL is protected by a 256-bit user-defined password, and it is possible to completely disable the BSL in the device configuration, if desired. The BSL is enabled by default from TI to support use of the BSL for production programming.

Using the BSL can involve the following pins, depending on the method:

  • UART interface: BSLRX and BSLTX signals
  • I2C interface: BSLSCL and BSLSDA signals
  • USB interface: BSLUSB_DM and BSLUSB_DP
  • Additional methods: BSL_invoke and NRST signals may be used for controlled invokation of the bootloader by an external host

If enabled, the BSL may be invoked (started) in the following ways:

  • The BSL is invoked during the boot process if the BSL_invoke pin state matches the defined BSL_invoke logic level. If the device fast boot mode is enabled, this invocation check is skipped. An external host can force the device into the BSL by asserting the invoke condition and applying a reset pulse to the NRST pin to trigger a BOOTRST, after which the device will verify the invoke condition during the reboot process and start the BSL if the invoke condition matches the expected logic level.
  • The BSL is automatically invoked during the boot process if the reset vector and stack pointer are left unprogrammed. As a result, a blank device from TI will invoke the BSL during the boot process without any need to provide a hardware invoke condition on the BSL_invoke pin. This enables production programming using just the serial interface signals.
  • The BSL may be invoked at runtime from application software by issuing a SYSRST with BSL entry command.

Table 8-21 BSL Pin Requirements and Functions
DEVICE SIGNALCONNECTIONBSL FUNCTION
BSLRXRequired for UARTUART receive signal (RXD), an input
BSLTXRequired for UARTUART transmit signal (TXD) an output
BSLSCLRequired for I2CI2C BSL clock signal (SCL)
BSLSDARequired for I2CI2C BSL data signal (SDA)
BSLUSB_DM Required for USB USB data minus signal (D-)
BSLUSB_DP Required for USB USB data positive signal (D+)
BSL_invokeOptionalActive-high digital input used to start the BSL during boot
NRSTOptionalActive-low reset pin used to trigger a reset and subsequent check of the invoke signal (BSL_invoke)

For a complete description of the BSL functionality and command set, see the MSPM0 boot strap loader user's guide.