SLVSHK4 December   2025 MCT8376Z-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings AUTO
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 SPI Timing Requirements
    7. 6.7 SPI Slave Mode Timings
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Output Stage
      2. 7.3.2  PWM Control Mode (1x PWM Mode)
        1. 7.3.2.1 Analog Hall Input Configuration
        2. 7.3.2.2 Digital Hall Input Configuration
        3. 7.3.2.3 Asynchronous Modulation
        4. 7.3.2.4 Synchronous Modulation
        5. 7.3.2.5 Motor Operation
      3. 7.3.3  Device Interface Modes
        1. 7.3.3.1 Serial Peripheral Interface (SPI)
        2. 7.3.3.2 Hardware Interface
      4. 7.3.4  AVDD and GVDD Linear Voltage Regulator
      5. 7.3.5  Charge Pump
      6. 7.3.6  Slew Rate Control
      7. 7.3.7  Cross Conduction (Dead Time)
      8. 7.3.8  Propagation Delay
      9. 7.3.9  Pin Diagrams
        1. 7.3.9.1 Logic Level Input Pin (Internal Pulldown)
        2. 7.3.9.2 Logic Level Input Pin (Internal Pullup)
        3. 7.3.9.3 Open Drain Pin
        4. 7.3.9.4 Push Pull Pin
        5. 7.3.9.5 Seven Level Input Pin
      10. 7.3.10 Current Sense Amplifier Output (SO)
      11. 7.3.11 Active Demagnetization
        1. 7.3.11.1 Automatic Synchronous Rectification Mode (ASR Mode)
          1. 7.3.11.1.1 Automatic Synchronous Rectification in Commutation
          2. 7.3.11.1.2 Automatic Synchronous Rectification in PWM Mode
        2. 7.3.11.2 Automatic Asynchronous Rectification Mode (AAR Mode)
      12. 7.3.12 Cycle-by-Cycle Current Limit
        1. 7.3.12.1 Cycle by Cycle Current Limit with 100% Duty Cycle Input
      13. 7.3.13 Hall Comparators (Analog Hall Inputs)
      14. 7.3.14 Advance Angle
      15. 7.3.15 FGOUT Signal
      16. 7.3.16 Protections
        1. 7.3.16.1 VM Supply Undervoltage Lockout (RESET)
        2. 7.3.16.2 AVDD Undervoltage Protection (AVDD_UV)
        3. 7.3.16.3 GVDD Undervoltage Lockout (GVDD_UV)
        4. 7.3.16.4 VCP Charge Pump Undervoltage Lockout (CPUV)
        5. 7.3.16.5 Overvoltage Protections (OV)
        6. 7.3.16.6 Overcurrent Protection (OCP)
          1. 7.3.16.6.1 OCP Latched Shutdown (OCP_MODE = 00b)
          2. 7.3.16.6.2 OCP Automatic Retry (OCP_MODE = 01b)
          3. 7.3.16.6.3 OCP Report Only (OCP_MODE = 10b)
          4. 7.3.16.6.4 OCP Disabled (OCP_MODE = 11b)
        7. 7.3.16.7 Motor Lock (MTR_LOCK)
          1. 7.3.16.7.1 MTR_LOCK Latched Shutdown (MTR_LOCK_MODE = 00b)
          2. 7.3.16.7.2 MTR_LOCK Automatic Retry (MTR_LOCK_MODE = 01b)
          3. 7.3.16.7.3 MTR_LOCK Report Only (MTR_LOCK_MODE= 10b)
          4. 7.3.16.7.4 MTR_LOCK Disabled (MTR_LOCK_MODE = 11b)
        8. 7.3.16.8 Thermal Warning (OTW)
        9. 7.3.16.9 Thermal Shutdown (OTS)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Functional Modes
        1. 7.4.1.1 Sleep Mode
        2. 7.4.1.2 Operating Mode
        3. 7.4.1.3 Fault Reset (CLR_FLT or nSLEEP Reset Pulse)
      2. 7.4.2 DRVOFF Functionality
    5. 7.5 SPI Communication
      1. 7.5.1 Programming
        1. 7.5.1.1 SPI Format
  9. 8 Register Map
    1. 8.1 STATUS Registers
    2. 8.2 CONTROL Registers
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Hall Sensor Configuration and Connection
      1. 9.2.1 Typical Configuration
      2. 9.2.2 Open Drain Configuration
      3. 9.2.3 Series Configuration
      4. 9.2.4 Parallel Configuration
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Bulk Capacitance
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
      3. 9.4.3 Thermal Considerations
        1. 9.4.3.1 Power Dissipation
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

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订购信息

1 Features

  • Three-phase BLDC motor driver with integrated Sensored Trapezoidal control
    • Hall Sensor based Trapezoidal (120°) commutation
    • Supports Analog or Digital Hall inputs
    • Configurable PWM modulation: Synchronous/Asynchronous
    • Supports 48V systems
    • Supports up to 100kHz PWM frequency
    • Active Demagnetization to reduce power losses
    • Cycle-by-cycle current limit to limit phase current
  • 4.5V to 65V operating voltage (70V abs max)
  • High output current capability: 4.5A Peak
  • Low MOSFET on-state resistance
    • 400mΩ RDS(ON) (HS + LS) at TA = 25°C
  • Reduced switching loss with 1.1V/ns slew rate and reverse recovery loss minimization technique
  • Low audible noise and ease of motor control with ultra-low dead time < 200ns, and propagation delay < 100ns
  • Low-power sleep mode
    • 1.5µA typical at VVM = 24V, TA = 25°C
  • Flexible device configuration options
  • Flexible device configuration options
    • MCT8376ZS-Q1: 5MHz 16bit SPI for device configuration and fault status
    • MCT8376ZH-Q1: Hardware pin-based configuration
  • Supports 1.8V, 3.3V, and 5V logic inputs
  • Built-in 3.3V (5%), 30mA LDO regulator
  • Built-in 5V (5%), 30mA LDO regulator
  • Integrated protection features
    • Supply under voltage lockout (UVLO)
    • Charge pump under voltage (CPUV)
    • Overcurrent protection (OCP)
    • Motor lock protection
    • Thermal warning and shutdown (OTW/OTSD)
    • Fault condition indication pin (nFAULT)
    • Optional fault diagnostics over SPI