SNVS699I February   2011  – May 2026 LM5045

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  High-Voltage Start-Up Regulator
      2. 6.3.2  Line Undervoltage Detector
      3. 6.3.3  Overvoltage Protection
      4. 6.3.4  Reference
      5. 6.3.5  Oscillator, Sync Input
      6. 6.3.6  Cycle-by-Cycle Current Limit
      7. 6.3.7  Hiccup Mode
      8. 6.3.8  PWM Comparator
      9. 6.3.9  Ramp Pin
      10. 6.3.10 Slope Pin
      11. 6.3.11 Soft-Start
      12. 6.3.12 Gate Driver Outputs
      13. 6.3.13 Synchronous Rectifier Control Outputs (SR1 and SR2)
      14. 6.3.14 Soft-Start of the Synchronous Rectifiers
      15. 6.3.15 Prebias Startup
      16. 6.3.16 Soft-Stop
      17. 6.3.17 Soft-Stop Off
      18. 6.3.18 Thermal Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Control Method Selection
      2. 6.4.2 Voltage Mode Control Using the LM5045
      3. 6.4.3 Current Mode Control Using the LM5045
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 VIN and VCC
        2. 7.2.2.2 For Applications With > 100 VIN
        3. 7.2.2.3 UVLO and OVP Voltage Divider Selection
        4. 7.2.2.4 Current Sense
        5. 7.2.2.5 Hiccup Mode Current Limit Restart
        6. 7.2.2.6 Augmenting the Gate Drive Strength
      3. 7.2.3 Application Curve
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

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6.3.12 Gate Driver Outputs

The LM5045 provides four gate drivers: two floating high-side gate drivers HO1 and HO2 and two ground referenced low-side gate drivers LO1 and LO2. Each internal driver is capable of source 1.5-A peak and sinking 2-A peak. Initially, the diagonal HO1 and LO2 are turned-on together, followed by an off-time when all the four gate driver outputs are off. In the subsequent phase the diagonal HO2 and LO1 are turned on together followed by an off-time. The low-side gate drivers are powered directly by the VCC regulator. The HO1 and HO2 gate drivers are powered from a bootstrap capacitor connected between BST1/BST2 and HS1/HS2, respectively. An external diode connected between VCC (anode pin) and BST (cathode pin) provides the high-side gate driver power by charging the bootstrap capacitor from VCC when the corresponding switch node (HS1/HS2 pin) is low. When the high side MOSFET is turned on, BST1 rises to a peak voltage equal to VCC + VHS1 where VHS1 is the switch node voltage.

The BST and VCC capacitors should be placed close to the pins of the LM5045 to minimize voltage transients due to parasitic inductances because the peak current sourced to the MOSFET gates can exceed 1.5 A. The recommended value of the BST capacitor is 0.1 μF or greater. A low ESR / ESL capacitor, such as a surface mount ceramic, should be used to prevent voltage droop during the HO transitions.

If the COMP pin is open circuit, the outputs will operate at maximum duty cycle. The maximum duty cycle for each phase is limited by the dead-time set by the RD1 resistor. If the RD1 resistor is set to zero then the maximum duty cycle is slightly less than 50% due to the internally fixed dead-time. The internally fixed dead-time is 30ns which does not vary with the operating frequency. The maximum duty cycle for each output can be calculated from the following equation:

Equation 2. LM5045

where

  • T1 is the time set by the RD1 resistor
  • FOSC is the frequency of the oscillator

For example, if the oscillator frequency is set at 400 kHz and the T1 time set by the RD1 resistor is 60 ns, the resulting DMAX will be equal to 0.488.

LM5045 Timing Diagram Illustrating the Maximum Duty Cycle and Dead-Time Set by RD1 Figure 6-3 Timing Diagram Illustrating the Maximum Duty Cycle and Dead-Time Set by RD1